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| author | Andrew Burgess <andrew.burgess@embecosm.com> | 2015-12-19 19:29:12 +0000 |
|---|---|---|
| committer | Joern Rennecke <amylaar@gcc.gnu.org> | 2015-12-19 19:29:12 +0000 |
| commit | 94d7642bda42e9105eed3038039417714acca729 (patch) | |
| tree | 2562a87bafc27f1aa56bf275d6c975f951b981c2 /gcc/config | |
| parent | 0086bd992fed3bf491be0c3f5387c4f6c9f2cace (diff) | |
| download | gcc-94d7642bda42e9105eed3038039417714acca729.zip gcc-94d7642bda42e9105eed3038039417714acca729.tar.gz gcc-94d7642bda42e9105eed3038039417714acca729.tar.bz2 | |
arc.md (*storeqi_update): Use 'memory_operand' and fix RTL pattern to include the plus.
2015-12-19 Andrew Burgess <andrew.burgess@embecosm.com>
* config/arc/arc.md (*storeqi_update): Use 'memory_operand' and
fix RTL pattern to include the plus.
(*storehi_update): Likewise.
(*storesi_update): Likewise.
(*storesf_update): Likewise.
* config/arc/predicates.md (store_update_operand): Delete.
From-SVN: r231850
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arc/arc.md | 24 | ||||
| -rw-r--r-- | gcc/config/arc/predicates.md | 18 |
2 files changed, 12 insertions, 30 deletions
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 7ca4431..9e73d02 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -1149,9 +1149,9 @@ (set_attr "length" "4,8")]) (define_insn "*storeqi_update" - [(set (match_operator:QI 4 "store_update_operand" - [(match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "short_immediate_operand" "I")]) + [(set (match_operator:QI 4 "any_mem_operand" + [(plus:SI (match_operand:SI 1 "register_operand" "0") + (match_operand:SI 2 "short_immediate_operand" "I"))]) (match_operand:QI 3 "register_operand" "c")) (set (match_operand:SI 0 "dest_reg_operand" "=w") (plus:SI (match_dup 1) (match_dup 2)))] @@ -1200,9 +1200,9 @@ (set_attr "length" "4,8")]) (define_insn "*storehi_update" - [(set (match_operator:HI 4 "store_update_operand" - [(match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "short_immediate_operand" "I")]) + [(set (match_operator:HI 4 "any_mem_operand" + [(plus:SI (match_operand:SI 1 "register_operand" "0") + (match_operand:SI 2 "short_immediate_operand" "I"))]) (match_operand:HI 3 "register_operand" "c")) (set (match_operand:SI 0 "dest_reg_operand" "=w") (plus:SI (match_dup 1) (match_dup 2)))] @@ -1225,9 +1225,9 @@ (set_attr "length" "4,8")]) (define_insn "*storesi_update" - [(set (match_operator:SI 4 "store_update_operand" - [(match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "short_immediate_operand" "I")]) + [(set (match_operator:SI 4 "any_mem_operand" + [(plus:SI (match_operand:SI 1 "register_operand" "0") + (match_operand:SI 2 "short_immediate_operand" "I"))]) (match_operand:SI 3 "register_operand" "c")) (set (match_operand:SI 0 "dest_reg_operand" "=w") (plus:SI (match_dup 1) (match_dup 2)))] @@ -1249,9 +1249,9 @@ (set_attr "length" "4,8")]) (define_insn "*storesf_update" - [(set (match_operator:SF 4 "store_update_operand" - [(match_operand:SI 1 "register_operand" "0") - (match_operand:SI 2 "short_immediate_operand" "I")]) + [(set (match_operator:SF 4 "any_mem_operand" + [(plus:SI (match_operand:SI 1 "register_operand" "0") + (match_operand:SI 2 "short_immediate_operand" "I"))]) (match_operand:SF 3 "register_operand" "c")) (set (match_operand:SI 0 "dest_reg_operand" "=w") (plus:SI (match_dup 1) (match_dup 2)))] diff --git a/gcc/config/arc/predicates.md b/gcc/config/arc/predicates.md index 268ff7e..ba11cd1 100644 --- a/gcc/config/arc/predicates.md +++ b/gcc/config/arc/predicates.md @@ -460,24 +460,6 @@ } ) -;; Return true if OP is valid store with update operand. -(define_predicate "store_update_operand" - (match_code "mem") -{ - if (GET_CODE (op) != MEM - || GET_MODE (op) != mode) - return 0; - op = XEXP (op, 0); - if (GET_CODE (op) != PLUS - || GET_MODE (op) != Pmode - || !register_operand (XEXP (op, 0), Pmode) - || !(GET_CODE (XEXP (op, 1)) == CONST_INT - && SMALL_INT (INTVAL (XEXP (op, 1))))) - return 0; - return 1; -} -) - ;; Return true if OP is a non-volatile non-immediate operand. ;; Volatile memory refs require a special "cache-bypass" instruction ;; and only the standard movXX patterns are set up to handle them. |