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| author | liuhongt <hongtao.liu@intel.com> | 2022-03-21 20:54:30 +0800 |
|---|---|---|
| committer | liuhongt <hongtao.liu@intel.com> | 2022-03-22 16:31:34 +0800 |
| commit | 919fbffef0755562cd3b686c838069c20bc7878f (patch) | |
| tree | 9da11ffc30ea692e46fcc3e0d4444fef3c578c7a /gcc/config | |
| parent | 7d5ee289510f0c7ac2c318e396c8a6f0d0d93db0 (diff) | |
| download | gcc-919fbffef0755562cd3b686c838069c20bc7878f.zip gcc-919fbffef0755562cd3b686c838069c20bc7878f.tar.gz gcc-919fbffef0755562cd3b686c838069c20bc7878f.tar.bz2 | |
Extend splitter pattern to reversed condition by swapping then and else rtx. [PR target/104982]
Failed to match this instruction:
(set (reg/v:SI 88 [ z ])
(if_then_else:SI (eq (zero_extract:SI (reg:SI 92)
(const_int 1 [0x1])
(zero_extend:SI (subreg:QI (reg:SI 93) 0)))
(const_int 0 [0]))
(reg:SI 95)
(reg:SI 94)))
but it's equal to
(set (reg/v:SI 88 [ z ])
(if_then_else:SI (ne (zero_extract:SI (reg:SI 92)
(const_int 1 [0x1])
(zero_extend:SI (subreg:QI (reg:SI 93) 0)))
(const_int 0 [0]))
(reg:SI 94)
(reg:SI 95)))
which is the exact existing splitter.
The patch will fix below regressions:
On x86-64, r12-7687 caused:
FAIL: gcc.target/i386/bt-5.c scan-assembler-not sar[lq][ \t]
FAIL: gcc.target/i386/bt-5.c scan-assembler-times bt[lq][ \t] 7
gcc/ChangeLog:
PR target/104982
* config/i386/i386.md (*jcc_bt<mode>_mask): Extend the
following splitter to reversed condition.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.md | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 02f298c..c74edd1 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -14182,12 +14182,12 @@ (define_split [(set (match_operand:SWI248 0 "register_operand") (if_then_else:SWI248 - (ne - (zero_extract:SWI48 - (match_operand:SWI48 1 "register_operand") - (const_int 1) - (zero_extend:SI (match_operand:QI 2 "register_operand"))) - (const_int 0)) + (match_operator 5 "bt_comparison_operator" + [(zero_extract:SWI48 + (match_operand:SWI48 1 "register_operand") + (const_int 1) + (zero_extend:SI (match_operand:QI 2 "register_operand"))) + (const_int 0)]) (match_operand:SWI248 3 "nonimmediate_operand") (match_operand:SWI248 4 "nonimmediate_operand")))] "TARGET_USE_BT && TARGET_CMOVE @@ -14202,6 +14202,8 @@ (match_dup 3) (match_dup 4)))] { + if (GET_CODE (operands[5]) == EQ) + std::swap (operands[3], operands[4]); operands[2] = lowpart_subreg (SImode, operands[2], QImode); }) |