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| author | Richard Sandiford <richard.sandiford@arm.com> | 2022-09-13 09:28:48 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2022-09-13 09:28:48 +0100 |
| commit | 91061fd5ace2b8ee6bf31bf5f5cbfdf55a25d5e1 (patch) | |
| tree | 3624448232b52bf6c63e98df488863165ed3e60f /gcc/config | |
| parent | eec36f27c3ca85d3b6b469e7161b63b69a5823ac (diff) | |
| download | gcc-91061fd5ace2b8ee6bf31bf5f5cbfdf55a25d5e1.zip gcc-91061fd5ace2b8ee6bf31bf5f5cbfdf55a25d5e1.tar.gz gcc-91061fd5ace2b8ee6bf31bf5f5cbfdf55a25d5e1.tar.bz2 | |
aarch64: Disassociate ls64 from simd
The ls64-related move expanders and splits required TARGET_SIMD.
That isn't necessary, since the 64-byte values are stored entirely
in GPRs. (The associated define_insn was already correct.)
I wondered about moving the patterns to aarch64.md, but it wasn't
clear-cut.
gcc/
* config/aarch64/aarch64-simd.md (movv8di): Remove TARGET_SIMD
condition. Likewise for the related define_split. Tweak formatting.
gcc/testsuite/
* gcc.target/aarch64/acle/ls64_asm_2.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/aarch64-simd.md | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 587a45d..d4662c7 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -7087,7 +7087,7 @@ (define_expand "movv8di" [(set (match_operand:V8DI 0 "nonimmediate_operand") (match_operand:V8DI 1 "general_operand"))] - "TARGET_SIMD" + "" { if (can_create_pseudo_p () && MEM_P (operands[0])) operands[1] = force_reg (V8DImode, operands[1]); @@ -7479,7 +7479,7 @@ (define_split [(set (match_operand:V8DI 0 "nonimmediate_operand") (match_operand:V8DI 1 "general_operand"))] - "TARGET_SIMD && reload_completed" + "reload_completed" [(const_int 0)] { if (register_operand (operands[0], V8DImode) @@ -7489,15 +7489,15 @@ DONE; } else if ((register_operand (operands[0], V8DImode) - && memory_operand (operands[1], V8DImode)) - || (memory_operand (operands[0], V8DImode) - && register_operand (operands[1], V8DImode))) + && memory_operand (operands[1], V8DImode)) + || (memory_operand (operands[0], V8DImode) + && register_operand (operands[1], V8DImode))) { for (int offset = 0; offset < 64; offset += 16) - emit_move_insn (simplify_gen_subreg (TImode, operands[0], - V8DImode, offset), - simplify_gen_subreg (TImode, operands[1], - V8DImode, offset)); + emit_move_insn (simplify_gen_subreg (TImode, operands[0], + V8DImode, offset), + simplify_gen_subreg (TImode, operands[1], + V8DImode, offset)); DONE; } else |