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authorUlrich Weigand <uweigand@de.ibm.com>2008-08-12 13:13:38 +0000
committerUlrich Weigand <uweigand@gcc.gnu.org>2008-08-12 13:13:38 +0000
commit88f091f5aec9a1d5a9deebe5cd743dcab2760d84 (patch)
treeb25b470542b27fbf4f61b6021a4e127af758b12b /gcc/config
parent4230d0fe3258a221706f791c04683bffb982e4f3 (diff)
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real.c (spu_single_format): New variable.
ChangeLog: * real.c (spu_single_format): New variable. * real.h (spu_single_format): Declare. * config/spu/spu.c (spu_override_options): Install SFmode format. (spu_split_immediate): Use integer mode to operate on pieces of floating-point values in all cases. * config/spu/spu.md (UNSPEC_FLOAT_EXTEND, UNSPEC_FLOAT_TRUNCATE): New. ("extendsfdf2"): Use UNSPEC_FLOAT_EXTEND instead of FLOAT_EXTEND. ("truncdfsf2"): Use UNSPEC_FLOAT_TRUNCATE instead of FLOAT_TRUNCATE. testsuite/ChangeLog: * gcc.c-torture/execute/ieee/inf-2.c (testf): Skip on the SPU. Co-Authored-By: Trevor Smigiel <Trevor_Smigiel@playstation.sony.com> From-SVN: r139013
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/spu/spu.c22
-rw-r--r--gcc/config/spu/spu.md8
2 files changed, 22 insertions, 8 deletions
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 230f4c0..1021a91 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -352,6 +352,8 @@ spu_override_options (void)
else
error ("Unknown architecture '%s'", &spu_tune_string[0]);
}
+
+ REAL_MODE_FORMAT (SFmode) = &spu_single_format;
}
/* Handle an attribute requiring a FUNCTION_DECL; arguments as in
@@ -1519,10 +1521,18 @@ spu_split_immediate (rtx * ops)
{
unsigned char arrhi[16];
unsigned char arrlo[16];
- rtx to, hi, lo;
+ rtx to, temp, hi, lo;
int i;
+ enum machine_mode imode = mode;
+ /* We need to do reals as ints because the constant used in the
+ IOR might not be a legitimate real constant. */
+ imode = int_mode_for_mode (mode);
constant_to_array (mode, ops[1], arrhi);
- to = !can_create_pseudo_p () ? ops[0] : gen_reg_rtx (mode);
+ if (imode != mode)
+ to = simplify_gen_subreg (imode, ops[0], mode, 0);
+ else
+ to = ops[0];
+ temp = !can_create_pseudo_p () ? to : gen_reg_rtx (imode);
for (i = 0; i < 16; i += 4)
{
arrlo[i + 2] = arrhi[i + 2];
@@ -1530,11 +1540,11 @@ spu_split_immediate (rtx * ops)
arrlo[i + 0] = arrlo[i + 1] = 0;
arrhi[i + 2] = arrhi[i + 3] = 0;
}
- hi = array_to_constant (mode, arrhi);
- lo = array_to_constant (mode, arrlo);
- emit_move_insn (to, hi);
+ hi = array_to_constant (imode, arrhi);
+ lo = array_to_constant (imode, arrlo);
+ emit_move_insn (temp, hi);
emit_insn (gen_rtx_SET
- (VOIDmode, ops[0], gen_rtx_IOR (mode, to, lo)));
+ (VOIDmode, to, gen_rtx_IOR (imode, temp, lo)));
return 1;
}
case IC_FSMBI2:
diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md
index c267efd..e50a65a 100644
--- a/gcc/config/spu/spu.md
+++ b/gcc/config/spu/spu.md
@@ -153,6 +153,8 @@
(UNSPEC_SPU_REALIGN_LOAD 49)
(UNSPEC_SPU_MASK_FOR_LOAD 50)
(UNSPEC_DFTSV 51)
+ (UNSPEC_FLOAT_EXTEND 52)
+ (UNSPEC_FLOAT_TRUNCATE 53)
])
(include "predicates.md")
@@ -648,14 +650,16 @@
(define_insn "extendsfdf2"
[(set (match_operand:DF 0 "spu_reg_operand" "=r")
- (float_extend:DF (match_operand:SF 1 "spu_reg_operand" "r")))]
+ (unspec:DF [(match_operand:SF 1 "spu_reg_operand" "r")]
+ UNSPEC_FLOAT_EXTEND))]
""
"fesd\t%0,%1"
[(set_attr "type" "fpd")])
(define_insn "truncdfsf2"
[(set (match_operand:SF 0 "spu_reg_operand" "=r")
- (float_truncate:SF (match_operand:DF 1 "spu_reg_operand" "r")))]
+ (unspec:SF [(match_operand:DF 1 "spu_reg_operand" "r")]
+ UNSPEC_FLOAT_TRUNCATE))]
""
"frds\t%0,%1"
[(set_attr "type" "fpd")])