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| author | Jiong Wang <jiong.wang@arm.com> | 2016-07-04 16:27:46 +0000 |
|---|---|---|
| committer | Jiong Wang <jiwang@gcc.gnu.org> | 2016-07-04 16:27:46 +0000 |
| commit | 74bb9de4ea808e156fe3545bff1500bdc5515728 (patch) | |
| tree | 5eb420512ed29fdc03a4e3abc4331b38cc083565 /gcc/config | |
| parent | 740f9751fbd5ab7475cd358a6f60e4ab04b923cd (diff) | |
| download | gcc-74bb9de4ea808e156fe3545bff1500bdc5515728.zip gcc-74bb9de4ea808e156fe3545bff1500bdc5515728.tar.gz gcc-74bb9de4ea808e156fe3545bff1500bdc5515728.tar.bz2 | |
[AArch64] Renaming ARMv8.1 to ARMv8.1-A in comments and documentations
* config/aarch64/aarch64.h: Rename "ARMv8.1" to "ARMv8.1-A".
* config/aarch64/aarch64_neon.h: Likewise.
* config/aarch64/arm_neon.h: Likewise.
* config/aarch64/atomics.md: Likewise.
* config/aarch64/aarch64-simd-builtins.def: Likewise.
* doc/invoke.texi: Likewise.
From-SVN: r237988
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/aarch64/aarch64-simd-builtins.def | 2 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.h | 6 | ||||
| -rw-r--r-- | gcc/config/aarch64/arm_neon.h | 2 | ||||
| -rw-r--r-- | gcc/config/aarch64/atomics.md | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 02d465b..3e4740c 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -432,7 +432,7 @@ VAR1 (TERNOP, qtbx4, 0, v8qi) VAR1 (TERNOP, qtbx4, 0, v16qi) - /* Builtins for ARMv8.1 Adv.SIMD instructions. */ + /* Builtins for ARMv8.1-A Adv.SIMD instructions. */ /* Implemented by aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>. */ BUILTIN_VSDQ_HSI (TERNOP, sqrdmlah, 0) diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 59805a9..1915980 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -132,9 +132,9 @@ extern unsigned aarch64_architecture_version; #define AARCH64_FL_FP (1 << 1) /* Has FP. */ #define AARCH64_FL_CRYPTO (1 << 2) /* Has crypto. */ #define AARCH64_FL_CRC (1 << 3) /* Has CRC. */ -/* ARMv8.1 architecture extensions. */ +/* ARMv8.1-A architecture extensions. */ #define AARCH64_FL_LSE (1 << 4) /* Has Large System Extensions. */ -#define AARCH64_FL_V8_1 (1 << 5) /* Has ARMv8.1 extensions. */ +#define AARCH64_FL_V8_1 (1 << 5) /* Has ARMv8.1-A extensions. */ /* ARMv8.2-A architecture extensions. */ #define AARCH64_FL_V8_2 (1 << 8) /* Has ARMv8.2-A features. */ #define AARCH64_FL_F16 (1 << 9) /* Has ARMv8.2-A FP16 extensions. */ @@ -204,7 +204,7 @@ extern unsigned aarch64_architecture_version; ((aarch64_fix_a53_err843419 == 2) \ ? TARGET_FIX_ERR_A53_843419_DEFAULT : aarch64_fix_a53_err843419) -/* ARMv8.1 Adv.SIMD support. */ +/* ARMv8.1-A Adv.SIMD support. */ #define TARGET_SIMD_RDMA (TARGET_SIMD && AARCH64_ISA_RDMA) /* Standard register usage. */ diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 4d5292e..ed24b59 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -10360,7 +10360,7 @@ vbslq_u64 (uint64x2_t __a, uint64x2_t __b, uint64x2_t __c) return __builtin_aarch64_simd_bslv2di_uuuu (__a, __b, __c); } -/* ARMv8.1 instrinsics. */ +/* ARMv8.1-A instrinsics. */ #pragma GCC push_options #pragma GCC target ("arch=armv8.1-a") diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index 3b65b4b..d84339d 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -583,7 +583,7 @@ } ) -;; ARMv8.1 LSE instructions. +;; ARMv8.1-A LSE instructions. ;; Atomic swap with memory. (define_insn "aarch64_atomic_swp<mode>" |