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authorRichard Sandiford <richard.sandiford@arm.com>2021-12-15 12:19:00 +0000
committerRichard Sandiford <richard.sandiford@arm.com>2021-12-15 12:19:00 +0000
commit73c3dacef9a30d7d66918606a97c496c71289f1b (patch)
tree10eb66864a051e17c90aae0821ff6d8a55085bbd /gcc/config
parent7527ddecef4721b3f4b00e8ad22d390b457c310b (diff)
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aarch64: Don't classify vector pairs as short vectors [PR103094]
In this PR we were wrongly classifying a pair of 8-byte vectors as a 16-byte “short vector” (in the AAPCS64 sense). As the comment in the patch says, this stems from an old condition in aarch64_short_vector_p that is too loose, but that would be difficult to tighten now. We can still do the right thing for the newly-added modes though, since there are no backwards compatibility concerns there. Co-authored-by: Tamar Christina <tamar.christina@arm.com> gcc/ PR target/103094 * config/aarch64/aarch64.c (aarch64_short_vector_p): Return false for structure modes, rather than ignoring the type in that case. gcc/testsuite/ PR target/103094 * gcc.target/aarch64/pr103094.c: New test.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/aarch64/aarch64.c19
1 files changed, 17 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index f07330c..ff4a808 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -19299,7 +19299,21 @@ aarch64_short_vector_p (const_tree type,
else if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
|| GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
{
- /* Rely only on the type, not the mode, when processing SVE types. */
+ /* The containing "else if" is too loose: it means that we look at TYPE
+ if the type is a vector type (good), but that we otherwise ignore TYPE
+ and look only at the mode. This is wrong because the type describes
+ the language-level information whereas the mode is purely an internal
+ GCC concept. We can therefore reach here for types that are not
+ vectors in the AAPCS64 sense.
+
+ We can't "fix" that for the traditional Advanced SIMD vector modes
+ without breaking backwards compatibility. However, there's no such
+ baggage for the structure modes, which were introduced in GCC 12. */
+ if (aarch64_advsimd_struct_mode_p (mode))
+ return false;
+
+ /* For similar reasons, rely only on the type, not the mode, when
+ processing SVE types. */
if (type && aarch64_some_values_include_pst_objects_p (type))
/* Leave later code to report an error if SVE is disabled. */
gcc_assert (!TARGET_SVE || aarch64_sve_mode_p (mode));
@@ -19310,7 +19324,8 @@ aarch64_short_vector_p (const_tree type,
{
/* 64-bit and 128-bit vectors should only acquire an SVE mode if
they are being treated as scalable AAPCS64 types. */
- gcc_assert (!aarch64_sve_mode_p (mode));
+ gcc_assert (!aarch64_sve_mode_p (mode)
+ && !aarch64_advsimd_struct_mode_p (mode));
return true;
}
return false;