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author | Segher Boessenkool <segher@kernel.crashing.org> | 2017-09-20 23:48:31 +0200 |
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committer | Segher Boessenkool <segher@gcc.gnu.org> | 2017-09-20 23:48:31 +0200 |
commit | 6073d0028debf7cbd80dc0678402cbe2c6ea652d (patch) | |
tree | fc2fcb802e5a5fb4290674455ed642597118e67b /gcc/config | |
parent | 9283471ba0d8b605a5ddf8cbd2814d81d4dd8550 (diff) | |
download | gcc-6073d0028debf7cbd80dc0678402cbe2c6ea652d.zip gcc-6073d0028debf7cbd80dc0678402cbe2c6ea652d.tar.gz gcc-6073d0028debf7cbd80dc0678402cbe2c6ea652d.tar.bz2 |
rs6000: Don't touch below the stack pointer (PR77687)
With the 32-bit SVR4 ABI we don't have a red zone, so we have to restore
the callee-saved registers before we restore the stack pointer.
The previous fix for this PR failed in two ways, for huge frames: first,
we use a negative offset from r11 in that case, so the (mem:BLK 11) access
does no good; second, sched does not handle accesses to mem:BLK correctly
in this case (does not make dependencies).
This patch fixes it by doing a store to (mem:BLK (scratch)) instead.
This means no unrelated (not to stack) loads/stores can be moved over the
stack restore either, but so be it.
PR target/77687
* config/rs6000/rs6000.md (stack_restore_tie): Store to a scratch
address instead of to r1 and r11.
gcc/testsuite/
PR target/77687
* gcc.target/powerpc/pr77687.c: New testcase.
From-SVN: r253033
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7f17628..13ba743 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -13161,14 +13161,12 @@ ; Some 32-bit ABIs do not have a red zone, so the stack deallocation has to ; stay behind all restores from the stack, it cannot be reordered to before -; one. See PR77687. This insn is an add or mr, and a stack_tie on the -; operands of that. +; one. See PR77687. This insn is an add or mr, and a memory clobber. (define_insn "stack_restore_tie" [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r") (plus:SI (match_operand:SI 1 "gpc_reg_operand" "r,r") (match_operand:SI 2 "reg_or_cint_operand" "O,rI"))) - (set (mem:BLK (match_dup 0)) (const_int 0)) - (set (mem:BLK (match_dup 1)) (const_int 0))] + (set (mem:BLK (scratch)) (const_int 0))] "TARGET_32BIT" "@ mr %0,%1 |