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| author | Dmitry Plotnikov <dplotnikov@ispras.ru> | 2011-12-23 13:53:17 +0000 |
|---|---|---|
| committer | Alexander Monakov <amonakov@gcc.gnu.org> | 2011-12-23 17:53:17 +0400 |
| commit | 5bf4dcf26d92bf18a53032378517e0365ba58385 (patch) | |
| tree | a230a11a4056486c4c65ff6047c308a5824a80ba /gcc/config | |
| parent | a17e8c059369ccc8a65fef8bdc33af01fb3da864 (diff) | |
| download | gcc-5bf4dcf26d92bf18a53032378517e0365ba58385.zip gcc-5bf4dcf26d92bf18a53032378517e0365ba58385.tar.gz gcc-5bf4dcf26d92bf18a53032378517e0365ba58385.tar.bz2 | |
neon.md (float<mode><V_cvtto>2): New.
2011-12-23 Dmitry Plotnikov <dplotnikov@ispras.ru>
* config/arm/neon.md (float<mode><V_cvtto>2): New.
(floatuns<mode><V_cvtto>2): New.
(fix_trunc<mode><V_cvtto>2): New.
(fix_truncuns<mode><V_cvtto>2): New.
* config/arm/iterators.md (V_cvtto): New iterator.
gcc/testsuite/:
* gcc.target/arm/vect-vcvt.c: New test.
* gcc.target/arm/vect-vcvtq.c: New test.
* gcc.dg/vect/fast-math-pr35982.c: Added vect_strided2 alternative
in final check.
* lib/target-supports.exp (check_effective_target_vect_intfloat_cvt):
True for ARM NEON.
(check_effective_target_vect_uintfloat_cvt): Likewise.
(check_effective_target_vect_floatuint_cvt): Likewise.
(check_effective_target_vect_floatint_cvt): Likewise.
From-SVN: r182657
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arm/iterators.md | 4 | ||||
| -rw-r--r-- | gcc/config/arm/neon.md | 44 |
2 files changed, 48 insertions, 0 deletions
diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index 08874ff..1567264 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -197,6 +197,10 @@ (define_mode_attr V_CVTTO [(V2SI "V2SF") (V2SF "V2SI") (V4SI "V4SF") (V4SF "V4SI")]) +;; As above but in lower case. +(define_mode_attr V_cvtto [(V2SI "v2sf") (V2SF "v2si") + (V4SI "v4sf") (V4SF "v4si")]) + ;; Define element mode for each vector mode. (define_mode_attr V_elem [(V8QI "QI") (V16QI "QI") (V4HI "HI") (V8HI "HI") diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 94e0a5f..d7caa37 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -2932,6 +2932,50 @@ DONE; }) +(define_insn "float<mode><V_cvtto>2" + [(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w") + (float:<V_CVTTO> (match_operand:VCVTI 1 "s_register_operand" "w")))] + "TARGET_NEON && !flag_rounding_math" + "vcvt.f32.s32\t%<V_reg>0, %<V_reg>1" + [(set (attr "neon_type") + (if_then_else (match_test "<Is_d_reg>") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + +(define_insn "floatuns<mode><V_cvtto>2" + [(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w") + (unsigned_float:<V_CVTTO> (match_operand:VCVTI 1 "s_register_operand" "w")))] + "TARGET_NEON && !flag_rounding_math" + "vcvt.f32.u32\t%<V_reg>0, %<V_reg>1" + [(set (attr "neon_type") + (if_then_else (match_test "<Is_d_reg>") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + +(define_insn "fix_trunc<mode><V_cvtto>2" + [(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w") + (fix:<V_CVTTO> (match_operand:VCVTF 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcvt.s32.f32\t%<V_reg>0, %<V_reg>1" + [(set (attr "neon_type") + (if_then_else (match_test "<Is_d_reg>") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + +(define_insn "fixuns_trunc<mode><V_cvtto>2" + [(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w") + (unsigned_fix:<V_CVTTO> (match_operand:VCVTF 1 "s_register_operand" "w")))] + "TARGET_NEON" + "vcvt.u32.f32\t%<V_reg>0, %<V_reg>1" + [(set (attr "neon_type") + (if_then_else (match_test "<Is_d_reg>") + (const_string "neon_fp_vadd_ddd_vabs_dd") + (const_string "neon_fp_vadd_qqq_vabs_qq")))] +) + (define_insn "neon_vcvt<mode>" [(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w") (unspec:<V_CVTTO> [(match_operand:VCVTF 1 "s_register_operand" "w") |