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| author | Julia Koval <julia.koval@intel.com> | 2017-12-15 05:31:08 +0100 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2017-12-15 04:31:08 +0000 |
| commit | 5a5d179739d7d3deaaf3d9788e8ddbd50ca35f00 (patch) | |
| tree | 15bc6163c9436e82e2ce9b5724477f0aca6d4b47 /gcc/config | |
| parent | 0ccdce5f5fba6f5aac01e235382c96c7793efd0a (diff) | |
| download | gcc-5a5d179739d7d3deaaf3d9788e8ddbd50ca35f00.zip gcc-5a5d179739d7d3deaaf3d9788e8ddbd50ca35f00.tar.gz gcc-5a5d179739d7d3deaaf3d9788e8ddbd50ca35f00.tar.bz2 | |
Enable VAES support [4/5]
gcc/
* config/i386/i386-builtin.def (__builtin_ia32_vaesenc_v16qi,
__builtin_ia32_vaesenc_v32qi, __builtin_ia32_vaesenc_v64qi): New.
* config/i386/sse.md (vaesenc_<mode>): New pattern.
* config/i386/vaesintrin.h (_mm256_aesenc_epi128, _mm512_aesenc_epi128,
_mm_aesenc_epi128): New intrinsics.
gcc/testsuite/
* gcc.target/i386/avx512f-aesenc-2.c: New test.
* gcc.target/i386/avx512vl-aesenc-2.c: Ditto.
* gcc.target/i386/avx512fvl-vaes-1.c: Handle new intrinsics.
From-SVN: r255675
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386-builtin.def | 3 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 11 | ||||
| -rw-r--r-- | gcc/config/i386/vaesintrin.h | 21 |
3 files changed, 35 insertions, 0 deletions
diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index 99b13cf..1fe9bdf 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -2770,6 +2770,9 @@ BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdec_v64qi, "__builtin_ia32_vaesdec_v64 BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v16qi, "__builtin_ia32_vaesdeclast_v16qi", IX86_BUILTIN_VAESDECLAST16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v32qi, "__builtin_ia32_vaesdeclast_v32qi", IX86_BUILTIN_VAESDECLAST32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesdeclast_v64qi, "__builtin_ia32_vaesdeclast_v64qi", IX86_BUILTIN_VAESDECLAST64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) +BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenc_v16qi, "__builtin_ia32_vaesenc_v16qi", IX86_BUILTIN_VAESENC16, UNKNOWN, (int) V16QI_FTYPE_V16QI_V16QI) +BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenc_v32qi, "__builtin_ia32_vaesenc_v32qi", IX86_BUILTIN_VAESENC32, UNKNOWN, (int) V32QI_FTYPE_V32QI_V32QI) +BDESC (OPTION_MASK_ISA_VAES, CODE_FOR_vaesenc_v64qi, "__builtin_ia32_vaesenc_v64qi", IX86_BUILTIN_VAESENC64, UNKNOWN, (int) V64QI_FTYPE_V64QI_V64QI) BDESC_END (ARGS2, SPECIAL_ARGS2) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index eedb345..ac37939 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -176,6 +176,7 @@ ;; For VAES support UNSPEC_VAESDEC UNSPEC_VAESDECLAST + UNSPEC_VAESENC ]) (define_c_enum "unspecv" [ @@ -20476,3 +20477,13 @@ "TARGET_VAES" "vaesdeclast\t{%2, %1, %0|%0, %1, %2}" ) + +(define_insn "vaesenc_<mode>" + [(set (match_operand:VI1_AVX512VL_F 0 "register_operand" "=v") + (unspec:VI1_AVX512VL_F + [(match_operand:VI1_AVX512VL_F 1 "register_operand" "v") + (match_operand:VI1_AVX512VL_F 2 "vector_operand" "vm")] + UNSPEC_VAESENC))] + "TARGET_VAES" + "vaesenc\t{%2, %1, %0|%0, %1, %2}" +) diff --git a/gcc/config/i386/vaesintrin.h b/gcc/config/i386/vaesintrin.h index 1159922..3bbfb39 100644 --- a/gcc/config/i386/vaesintrin.h +++ b/gcc/config/i386/vaesintrin.h @@ -22,6 +22,13 @@ _mm256_aesdeclast_epi128 (__m256i __A, __m256i __B) (__v32qi) __B); } +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_aesenc_epi128 (__m256i __A, __m256i __B) +{ + return (__m256i)__builtin_ia32_vaesenc_v32qi ((__v32qi) __A, (__v32qi) __B); +} + #ifdef __DISABLE_VAES__ #undef __DISABLE_VAES__ #pragma GCC pop_options @@ -50,6 +57,13 @@ _mm512_aesdeclast_epi128 (__m512i __A, __m512i __B) (__v64qi) __B); } +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_aesenc_epi128 (__m512i __A, __m512i __B) +{ + return (__m512i)__builtin_ia32_vaesenc_v64qi ((__v64qi) __A, (__v64qi) __B); +} + #ifdef __DISABLE_VAESF__ #undef __DISABLE_VAESF__ #pragma GCC pop_options @@ -76,6 +90,13 @@ _mm_aesdeclast_epi128 (__m128i __A, __m128i __B) (__v16qi) __B); } +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_aesenc_epi128 (__m128i __A, __m128i __B) +{ + return (__m128i)__builtin_ia32_vaesenc_v16qi ((__v16qi) __A, (__v16qi) __B); +} + #ifdef __DISABLE_VAESVL__ #undef __DISABLE_VAESVL__ #pragma GCC pop_options |