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| author | Uros Bizjak <ubizjak@gmail.com> | 2017-01-04 16:42:36 +0100 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2017-01-04 16:42:36 +0100 |
| commit | 58adb11b3021a6495d990ba7840f09022e2a6dfd (patch) | |
| tree | ebcd9be14c2bd55dab8801d9191c900bbcccc406 /gcc/config | |
| parent | 2a792efe7f9c17b3a89a1e281cb9cbe814c91e16 (diff) | |
| download | gcc-58adb11b3021a6495d990ba7840f09022e2a6dfd.zip gcc-58adb11b3021a6495d990ba7840f09022e2a6dfd.tar.gz gcc-58adb11b3021a6495d990ba7840f09022e2a6dfd.tar.bz2 | |
i386.md (HI/SImode test with imm to QImode splitters): Use gen_int_mode instead of gen_lopwart for const_int operands.
* config/i386/i386.md (HI/SImode test with imm to QImode splitters):
Use gen_int_mode instead of gen_lopwart for const_int operands.
From-SVN: r244058
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/i386.md | 6 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index c947955..807dc65 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -8092,7 +8092,7 @@ (const_int 0)]))] { operands[2] = gen_lowpart (QImode, operands[2]); - operands[3] = gen_lowpart (QImode, operands[3]); + operands[3] = gen_int_mode (INTVAL (operands[3]), QImode); }) ;; %%% This used to optimize known byte-wide and operations to memory, @@ -8574,7 +8574,7 @@ { operands[0] = gen_lowpart (QImode, operands[0]); operands[1] = gen_lowpart (QImode, operands[1]); - operands[2] = gen_lowpart (QImode, operands[2]); + operands[2] = gen_int_mode (INTVAL (operands[2]), QImode); }) (define_insn "*andndi3_doubleword" @@ -8933,7 +8933,7 @@ { operands[0] = gen_lowpart (QImode, operands[0]); operands[1] = gen_lowpart (QImode, operands[1]); - operands[2] = gen_lowpart (QImode, operands[2]); + operands[2] = gen_int_mode (INTVAL (operands[2]), QImode); }) (define_expand "xorqi_ext_1_cc" diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 123fe37..32b4901 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1181,8 +1181,8 @@ (match_operand:DF 3 "memory_operand")))] "TARGET_SSE2 && TARGET_SSE_UNALIGNED_LOAD_OPTIMAL && ix86_operands_ok_for_move_multiple (operands, true, DFmode)" - [(set (match_dup 2) (match_dup 4))] - "operands[4] = adjust_address (operands[1], V2DFmode, 0);") + [(set (match_dup 2) (match_dup 5))] + "operands[5] = adjust_address (operands[1], V2DFmode, 0);") (define_peephole2 [(set (match_operand:DF 0 "sse_reg_operand") @@ -1193,8 +1193,8 @@ "TARGET_SSE2 && TARGET_SSE_UNALIGNED_LOAD_OPTIMAL && REGNO (operands[4]) == REGNO (operands[2]) && ix86_operands_ok_for_move_multiple (operands, true, DFmode)" - [(set (match_dup 2) (match_dup 4))] - "operands[4] = adjust_address (operands[1], V2DFmode, 0);") + [(set (match_dup 2) (match_dup 5))] + "operands[5] = adjust_address (operands[1], V2DFmode, 0);") ;; Merge movlpd/movhpd to movupd for TARGET_SSE_UNALIGNED_STORE_OPTIMAL targets. (define_peephole2 |