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| author | Uros Bizjak <uros@gcc.gnu.org> | 2007-07-10 21:26:58 +0200 |
|---|---|---|
| committer | Uros Bizjak <uros@gcc.gnu.org> | 2007-07-10 21:26:58 +0200 |
| commit | 558be301bddc36ccee1daf43d74c0a6296d3eb13 (patch) | |
| tree | ee7ed21f874f952e037c7236575aadae2ed40fa9 /gcc/config | |
| parent | 1ef8ecdd2e46e4b291cf7f3f1514497ba8bade5f (diff) | |
| download | gcc-558be301bddc36ccee1daf43d74c0a6296d3eb13.zip gcc-558be301bddc36ccee1daf43d74c0a6296d3eb13.tar.gz gcc-558be301bddc36ccee1daf43d74c0a6296d3eb13.tar.bz2 | |
re PR target/32708 (_mm_cvtsi64x_si128() and _mm_cvtsi128_si64x() inefficient)
PR target/32708
* config/i386/sse.md (vec_concatv2di): Disable for TARGET_64BIT.
(*vec_concatv2di_rex): New insn pattern.
testsuite/ChangeLog:
PR target/32708
* gcc.target/i386/pr32708-1.c: New test.
* gcc.target/i386/pr32708-2.c: Ditto.
* gcc.target/i386/pr32708-3.c: Ditto.
From-SVN: r126523
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/sse.md | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 12b8cc8..027d43b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4717,7 +4717,7 @@ (vec_concat:V2DI (match_operand:DI 1 "nonimmediate_operand" " m,*y ,0 ,0,0,m") (match_operand:DI 2 "vector_move_operand" " C, C,Yt,x,m,0")))] - "TARGET_SSE" + "!TARGET_64BIT && TARGET_SSE" "@ movq\t{%1, %0|%0, %1} movq2dq\t{%1, %0|%0, %1} @@ -4728,6 +4728,23 @@ [(set_attr "type" "ssemov,ssemov,sselog,ssemov,ssemov,ssemov") (set_attr "mode" "TI,TI,TI,V4SF,V2SF,V2SF")]) +(define_insn "*vec_concatv2di_rex" + [(set (match_operand:V2DI 0 "register_operand" "=Yt,Yi,!Yt,Yt,x,x,x") + (vec_concat:V2DI + (match_operand:DI 1 "nonimmediate_operand" " m,r ,*y ,0 ,0,0,m") + (match_operand:DI 2 "vector_move_operand" " C,C ,C ,Yt,x,m,0")))] + "TARGET_64BIT" + "@ + movq\t{%1, %0|%0, %1} + movq\t{%1, %0|%0, %1} + movq2dq\t{%1, %0|%0, %1} + punpcklqdq\t{%2, %0|%0, %2} + movlhps\t{%2, %0|%0, %2} + movhps\t{%2, %0|%0, %2} + movlps\t{%1, %0|%0, %1}" + [(set_attr "type" "ssemov,ssemov,ssemov,sselog,ssemov,ssemov,ssemov") + (set_attr "mode" "TI,TI,TI,TI,V4SF,V2SF,V2SF")]) + (define_expand "vec_setv2di" [(match_operand:V2DI 0 "register_operand" "") (match_operand:DI 1 "register_operand" "") |