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authorNathan Sidwell <nathan@codesourcery.com>2015-06-29 23:23:10 +0000
committerNathan Sidwell <nathan@gcc.gnu.org>2015-06-29 23:23:10 +0000
commit517665b38b3e0e08310a6556e6ba734f79352a7a (patch)
tree83f36160f250583112fc7d3f297197b4e5b12755 /gcc/config
parent71506d4107f7cf3eef78bb9fa9743b7765e43fd9 (diff)
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nvptx.md (nvptx_reorg_subreg): New fn, broken out of ...
* config/nvptx/nvptx.md (nvptx_reorg_subreg): New fn, broken out of ... (nvptx_reorg): Here. Keep the non-subreg pieces. From-SVN: r225154
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/nvptx/nvptx.c46
1 files changed, 34 insertions, 12 deletions
diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c
index 43f197f..3d6315a 100644
--- a/gcc/config/nvptx/nvptx.c
+++ b/gcc/config/nvptx/nvptx.c
@@ -1,3 +1,4 @@
+
/* Target code for NVPTX.
Copyright (C) 2014-2015 Free Software Foundation, Inc.
Contributed by Bernd Schmidt <bernds@codesourcery.com>
@@ -1877,20 +1878,11 @@ get_replacement (struct reg_replace *r)
conversion copyin/copyout instructions. */
static void
-nvptx_reorg (void)
+nvptx_reorg_subreg (void)
{
struct reg_replace qiregs, hiregs, siregs, diregs;
rtx_insn *insn, *next;
- /* We are freeing block_for_insn in the toplev to keep compatibility
- with old MDEP_REORGS that are not CFG based. Recompute it now. */
- compute_bb_for_insn ();
-
- df_clear_flags (DF_LR_RUN_DCE);
- df_analyze ();
-
- thread_prologue_and_epilogue_insns ();
-
qiregs.n_allocated = 0;
hiregs.n_allocated = 0;
siregs.n_allocated = 0;
@@ -1966,14 +1958,44 @@ nvptx_reorg (void)
validate_change (insn, recog_data.operand_loc[i], new_reg, false);
}
}
+}
- int maxregs = max_reg_num ();
+/* PTX-specific reorganization
+ 1) mark now-unused registers, so function begin doesn't declare
+ unused registers.
+ 2) replace subregs with suitable sequences.
+*/
+
+static void
+nvptx_reorg (void)
+{
+ struct reg_replace qiregs, hiregs, siregs, diregs;
+ rtx_insn *insn, *next;
+
+ /* We are freeing block_for_insn in the toplev to keep compatibility
+ with old MDEP_REORGS that are not CFG based. Recompute it now. */
+ compute_bb_for_insn ();
+
+ thread_prologue_and_epilogue_insns ();
+
+ df_clear_flags (DF_LR_RUN_DCE);
+ df_set_flags (DF_NO_INSN_RESCAN | DF_NO_HARD_REGS);
+ df_analyze ();
regstat_init_n_sets_and_refs ();
- for (int i = LAST_VIRTUAL_REGISTER + 1; i < maxregs; i++)
+ int max_regs = max_reg_num ();
+
+ /* Mark unused regs as unused. */
+ for (int i = LAST_VIRTUAL_REGISTER + 1; i < max_regs; i++)
if (REG_N_SETS (i) == 0 && REG_N_REFS (i) == 0)
regno_reg_rtx[i] = const0_rtx;
+
+ /* Replace subregs. */
+ nvptx_reorg_subreg (max_regs);
+
regstat_free_n_sets_and_refs ();
+
+ df_finish_pass (true);
}
/* Handle a "kernel" attribute; arguments as in