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author | David Edelsohn <edelsohn@gnu.org> | 2003-07-01 19:07:40 +0000 |
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committer | David Edelsohn <dje@gcc.gnu.org> | 2003-07-01 15:07:40 -0400 |
commit | 43b68ce57af3cd273a2a5842c69da6d60a34e3d0 (patch) | |
tree | d0f84b66931a2b8e0ad2e573b5cf7a81c764b28b /gcc/config | |
parent | 33e9d2aa3de5ab3e8267ffed4e1fd927de469552 (diff) | |
download | gcc-43b68ce57af3cd273a2a5842c69da6d60a34e3d0.zip gcc-43b68ce57af3cd273a2a5842c69da6d60a34e3d0.tar.gz gcc-43b68ce57af3cd273a2a5842c69da6d60a34e3d0.tar.bz2 |
rs6000.md (ctr{s,d}i_internal?): Add earlyclobber for MEM case.
* config/rs6000/rs6000.md (ctr{s,d}i_internal?): Add earlyclobber
for MEM case.
Co-Authored-By: J"orn Rennecke <joern.rennecke@superh.com>
From-SVN: r68788
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 120 |
1 files changed, 60 insertions, 60 deletions
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 1e891f1..cb50e7e 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -13989,15 +13989,15 @@ (define_insn "*ctrsi_internal1" [(set (pc) - (if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r") + (if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l") + (set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:SI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:SI 4 "=X,X,&r,r"))] "! TARGET_POWERPC64" "* { @@ -14009,19 +14009,19 @@ return \"bdz $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrsi_internal2" [(set (pc) - (if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r") + (if_then_else (ne (match_operand:SI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l") + (set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:SI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:SI 4 "=X,X,&r,r"))] "! TARGET_POWERPC64" "* { @@ -14033,19 +14033,19 @@ return \"{bdn|bdnz} $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrdi_internal1" [(set (pc) - (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r") + (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l") + (set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:DI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:DI 4 "=X,X,&r,r"))] "TARGET_POWERPC64" "* { @@ -14057,19 +14057,19 @@ return \"bdz $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrdi_internal2" [(set (pc) - (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r") + (if_then_else (ne (match_operand:DI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l") + (set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:DI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:DI 4 "=X,X,&r,r"))] "TARGET_POWERPC64" "* { @@ -14081,21 +14081,21 @@ return \"{bdn|bdnz} $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) ;; Similar, but we can use GE since we have a REG_NONNEG. (define_insn "*ctrsi_internal3" [(set (pc) - (if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r") + (if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r,*r") (const_int 0)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l") + (set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&X")) - (clobber (match_scratch:SI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:SI 4 "=X,X,&r,r"))] "! TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)" "* { @@ -14107,19 +14107,19 @@ return \"bdz $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrsi_internal4" [(set (pc) - (if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r") + (if_then_else (ge (match_operand:SI 1 "register_operand" "c,*r,*r,*r") (const_int 0)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l") + (set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&X")) - (clobber (match_scratch:SI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:SI 4 "=X,X,&r,r"))] "! TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)" "* { @@ -14131,19 +14131,19 @@ return \"{bdn|bdnz} $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrdi_internal3" [(set (pc) - (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r") + (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,*r") (const_int 0)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l") + (set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:DI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:DI 4 "=X,X,&r,r"))] "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)" "* { @@ -14155,19 +14155,19 @@ return \"bdz $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrdi_internal4" [(set (pc) - (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r") + (if_then_else (ge (match_operand:DI 1 "register_operand" "c,*r,*r,*r") (const_int 0)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l") + (set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:DI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:DI 4 "=X,X,&r,r"))] "TARGET_POWERPC64 && find_reg_note (insn, REG_NONNEG, 0)" "* { @@ -14179,21 +14179,21 @@ return \"{bdn|bdnz} $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) ;; Similar but use EQ (define_insn "*ctrsi_internal5" [(set (pc) - (if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r") + (if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l") + (set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:SI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:SI 4 "=X,X,&r,r"))] "! TARGET_POWERPC64" "* { @@ -14205,19 +14205,19 @@ return \"{bdn|bdnz} $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrsi_internal6" [(set (pc) - (if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r") + (if_then_else (eq (match_operand:SI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:SI 2 "register_operand" "=1,*r,m*q*c*l") + (set (match_operand:SI 2 "register_operand" "=1,*r,m,*q*c*l") (plus:SI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:SI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:SI 4 "=X,X,&r,r"))] "! TARGET_POWERPC64" "* { @@ -14229,19 +14229,19 @@ return \"bdz $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrdi_internal5" [(set (pc) - (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r") + (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l") + (set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:DI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:DI 4 "=X,X,&r,r"))] "TARGET_POWERPC64" "* { @@ -14253,19 +14253,19 @@ return \"{bdn|bdnz} $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) (define_insn "*ctrdi_internal6" [(set (pc) - (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r") + (if_then_else (eq (match_operand:DI 1 "register_operand" "c,*r,*r,*r") (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:DI 2 "register_operand" "=1,*r,m*c*l") + (set (match_operand:DI 2 "register_operand" "=1,*r,m,*c*l") (plus:DI (match_dup 1) (const_int -1))) - (clobber (match_scratch:CC 3 "=X,&x,&x")) - (clobber (match_scratch:DI 4 "=X,X,r"))] + (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) + (clobber (match_scratch:DI 4 "=X,X,&r,r"))] "TARGET_POWERPC64" "* { @@ -14277,7 +14277,7 @@ return \"bdz $+8\;b %l0\"; }" [(set_attr "type" "branch") - (set_attr "length" "4,12,16")]) + (set_attr "length" "4,12,16,16")]) ;; Now the splitters if we could not allocate the CTR register |