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authorOleg Endo <olegendo@gcc.gnu.org>2015-06-25 23:12:07 +0000
committerOleg Endo <olegendo@gcc.gnu.org>2015-06-25 23:12:07 +0000
commit411be49d64b9be1b24a3925c5b245af0d876cffa (patch)
tree9ef02c399f6be2e6d8f5d97e20c1fbfb89103204 /gcc/config
parent4115076d89d75a8ad4673df344645a05ad94c3c3 (diff)
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re PR target/65979 ([SH] Wrong code is generated with stage1 compiler)
gcc/ PR target/65979 PR target/66611 * config/sh/sh.md (tstsi_t peephole2): Use insn_invalid_p to check if the replacement insn will work. From-SVN: r224988
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/sh/sh.md30
1 files changed, 26 insertions, 4 deletions
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 43cd949..35113c0 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -14733,8 +14733,19 @@ label:
if (REGNO (operands[1]) == REGNO (operands[2]))
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));
- sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
- operands[3])));
+ // We don't know what the new set insn will be in detail. Just make sure
+ // that it still can be recognized and the constraints are satisfied.
+ rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], operands[3]));
+
+ recog_data_d prev_recog_data = recog_data;
+ bool i_invalid = insn_invalid_p (i, false);
+ recog_data = prev_recog_data;
+
+ if (i_invalid)
+ FAIL;
+
+ sh_check_add_incdec_notes (i);
+
emit_insn (gen_tstsi_t (operands[2],
gen_rtx_REG (SImode, (REGNO (operands[1])))));
})
@@ -14761,8 +14772,19 @@ label:
|| REGNO (operands[2]) == REGNO (operands[5]))"
[(const_int 0)]
{
- sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
- operands[3])));
+ // We don't know what the new set insn will be in detail. Just make sure
+ // that it still can be recognized and the constraints are satisfied.
+ rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], operands[3]));
+
+ recog_data_d prev_recog_data = recog_data;
+ bool i_invalid = insn_invalid_p (i, false);
+ recog_data = prev_recog_data;
+
+ if (i_invalid)
+ FAIL;
+
+ sh_check_add_incdec_notes (i);
+
emit_insn (gen_tstsi_t (operands[2],
gen_rtx_REG (SImode, (REGNO (operands[1])))));
})