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author | Richard Sandiford <rsandifo@redhat.com> | 2002-10-01 10:26:09 +0000 |
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committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2002-10-01 10:26:09 +0000 |
commit | 3f7967e390a7cb0a06527a5ebf8a7f6a040b047b (patch) | |
tree | 5e2ec5569f314b767e21fa94b07cbeed6dcbd547 /gcc/config | |
parent | 41f9efba657378f8b78a2f4f300e2d2516a90590 (diff) | |
download | gcc-3f7967e390a7cb0a06527a5ebf8a7f6a040b047b.zip gcc-3f7967e390a7cb0a06527a5ebf8a7f6a040b047b.tar.gz gcc-3f7967e390a7cb0a06527a5ebf8a7f6a040b047b.tar.bz2 |
mips.h (PROCESSOR_R4121): Rename to PROCESSOR_R4120.
* config/mips/mips.h (PROCESSOR_R4121): Rename to PROCESSOR_R4120.
(TARGET_MIPS4121): Rename to TARGET_MIPS4120.
* config/mips/mips.c (mips_cpu_info): Rename vr4121 to vr4120.
* config/mips/mips.md: Apply same renaming here.
From-SVN: r57687
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/mips/mips.c | 2 | ||||
-rw-r--r-- | gcc/config/mips/mips.h | 4 | ||||
-rw-r--r-- | gcc/config/mips/mips.md | 18 |
3 files changed, 12 insertions, 12 deletions
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ea9ad0f..0744aba 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -596,7 +596,7 @@ const struct mips_cpu_info mips_cpu_info_table[] = { { "r4000", PROCESSOR_R4000, 3 }, { "vr4100", PROCESSOR_R4100, 3 }, { "vr4111", PROCESSOR_R4111, 3 }, - { "vr4121", PROCESSOR_R4121, 3 }, + { "vr4120", PROCESSOR_R4120, 3 }, { "vr4300", PROCESSOR_R4300, 3 }, { "r4400", PROCESSOR_R4000, 3 }, /* = r4000 */ { "r4600", PROCESSOR_R4600, 3 }, diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 632d962..61e827b 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -64,7 +64,7 @@ enum processor_type { PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, - PROCESSOR_R4121, + PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, @@ -357,7 +357,7 @@ extern void sbss_section PARAMS ((void)); #define TARGET_MIPS3900 (mips_arch == PROCESSOR_R3900) #define TARGET_MIPS4000 (mips_arch == PROCESSOR_R4000) #define TARGET_MIPS4100 (mips_arch == PROCESSOR_R4100) -#define TARGET_MIPS4121 (mips_arch == PROCESSOR_R4121) +#define TARGET_MIPS4120 (mips_arch == PROCESSOR_R4120) #define TARGET_MIPS4300 (mips_arch == PROCESSOR_R4300) #define TARGET_MIPS4KC (mips_arch == PROCESSOR_R4KC) #define TARGET_MIPS5KC (mips_arch == PROCESSOR_R5KC) diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 2336bdf..bd36d05 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -122,7 +122,7 @@ ;; ??? Fix everything that tests this attribute. (define_attr "cpu" - "default,r3000,r3900,r6000,r4000,r4100,r4121,r4300,r4600,r4650,r5000,r5400,r5500,r8000,sr71000,r4kc,r5kc,r20kc" + "default,r3000,r3900,r6000,r4000,r4100,r4120,r4300,r4600,r4650,r5000,r5400,r5500,r8000,sr71000,r4kc,r5kc,r20kc" (const (symbol_ref "mips_cpu_attr"))) ;; Does the instruction have a mandatory delay slot? @@ -207,12 +207,12 @@ (define_function_unit "memory" 1 0 (and (eq_attr "type" "load") - (eq_attr "cpu" "!r3000,r3900,r4600,r4650,r4100,r4121,r4300,r5000")) + (eq_attr "cpu" "!r3000,r3900,r4600,r4650,r4100,r4120,r4300,r5000")) 3 0) (define_function_unit "memory" 1 0 (and (eq_attr "type" "load") - (eq_attr "cpu" "r3000,r3900,r4600,r4650,r4100,r4121,r4300,r5000")) + (eq_attr "cpu" "r3000,r3900,r4600,r4650,r4100,r4120,r4300,r5000")) 2 0) (define_function_unit "memory" 1 0 (eq_attr "type" "store") 1 0) @@ -225,7 +225,7 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "imul,imadd") - (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4121,r4300,r5000")) + (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) 17 17) ;; On them mips16, we want to stronly discourage a mult from appearing @@ -252,12 +252,12 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "imul,imadd") - (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4121"))) + (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4120"))) 1 1) (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "imul,imadd") - (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4121"))) + (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4120"))) 4 4) (define_function_unit "imuldiv" 1 0 @@ -277,7 +277,7 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "idiv") - (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4121,r4300,r5000")) + (eq_attr "cpu" "!r3000,r3900,r4000,r4600,r4650,r4100,r4120,r4300,r5000")) 38 38) (define_function_unit "imuldiv" 1 0 @@ -298,12 +298,12 @@ (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "idiv") - (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4121"))) + (and (eq_attr "mode" "SI") (eq_attr "cpu" "r4100,r4120"))) 35 35) (define_function_unit "imuldiv" 1 0 (and (eq_attr "type" "idiv") - (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4121"))) + (and (eq_attr "mode" "DI") (eq_attr "cpu" "r4100,r4120"))) 67 67) (define_function_unit "imuldiv" 1 0 |