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authorJakub Jelinek <jakub@redhat.com>2022-02-25 18:58:48 +0100
committerJakub Jelinek <jakub@redhat.com>2022-02-25 18:58:48 +0100
commit3885a122f817a1b6dca4a84ba9e020d5ab2060af (patch)
treeb9385e84f6c96ca5434f9d7759a896652f93e0a6 /gcc/config
parentcc187fbca79ee9d107e5e3ea24dd649ce26aba74 (diff)
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rs6000: Use rs6000_emit_move in movmisalign<mode> expander [PR104681]
The following testcase ICEs, because for some strange reason it decides to use movmisaligntf during expansion where the destination is MEM and source is CONST_DOUBLE. For normal mov<mode> expanders the rs6000 backend uses rs6000_emit_move to ensure that if one operand is a MEM, the other is a REG and a few other things, but for movmisalign<mode> nothing enforced this. The middle-end documents that movmisalign<mode> shouldn't fail, so we can't force that through predicates or condition on the expander. 2022-02-25 Jakub Jelinek <jakub@redhat.com> PR target/104681 * config/rs6000/vector.md (movmisalign<mode>): Use rs6000_emit_move. * g++.dg/opt/pr104681.C: New test.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/rs6000/vector.md5
1 files changed, 4 insertions, 1 deletions
diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md
index b87a742..4d0797c 100644
--- a/gcc/config/rs6000/vector.md
+++ b/gcc/config/rs6000/vector.md
@@ -1519,7 +1519,10 @@
[(set (match_operand:VEC_N 0 "nonimmediate_operand")
(match_operand:VEC_N 1 "any_operand"))]
"VECTOR_MEM_VSX_P (<MODE>mode) && TARGET_ALLOW_MOVMISALIGN"
- "")
+{
+ rs6000_emit_move (operands[0], operands[1], <MODE>mode);
+ DONE;
+})
;; Vector shift right in bits. Currently supported ony for shift
;; amounts that can be expressed as byte shifts (divisible by 8).