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| author | Jakub Jelinek <jakub@redhat.com> | 2018-05-08 14:02:38 +0200 |
|---|---|---|
| committer | Jakub Jelinek <jakub@gcc.gnu.org> | 2018-05-08 14:02:38 +0200 |
| commit | 294c6f66373d29a9300a414fab24f1eefb473ccf (patch) | |
| tree | 68b1c13067763c232bd3b11113242401b5764431 /gcc/config | |
| parent | 57cfbfbab8ec2a2ca4fb060bf95e0d03a8df57f2 (diff) | |
| download | gcc-294c6f66373d29a9300a414fab24f1eefb473ccf.zip gcc-294c6f66373d29a9300a414fab24f1eefb473ccf.tar.gz gcc-294c6f66373d29a9300a414fab24f1eefb473ccf.tar.bz2 | |
re PR target/85480 (zero extension from xmm to zmm via _mm512_insert???x? not optimized)
PR target/85480
* config/i386/sse.md (ssequaterinsnmode): New mode attribute.
(*<extract_type>_vinsert<shuffletype><extract_suf>_0): New pattern.
* gcc.target/i386/avx512dq-pr85480-1.c: New test.
* gcc.target/i386/avx512dq-pr85480-2.c: New test.
From-SVN: r260039
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/sse.md | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 858c29e..aab4261 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -581,6 +581,9 @@ (define_mode_attr ssequartermode [(V16SF "V4SF") (V8DF "V2DF") (V16SI "V4SI") (V8DI "V2DI")]) +(define_mode_attr ssequarterinsnmode + [(V16SF "V4SF") (V8DF "V2DF") (V16SI "TI") (V8DI "TI")]) + (define_mode_attr ssedoublemodelower [(V16QI "v16hi") (V32QI "v32hi") (V64QI "v64hi") (V8HI "v8si") (V16HI "v16si") (V32HI "v32si") @@ -12721,6 +12724,40 @@ DONE; }) +(define_insn "*<extract_type>_vinsert<shuffletype><extract_suf>_0" + [(set (match_operand:AVX512_VEC 0 "register_operand" "=v,x,Yv") + (vec_merge:AVX512_VEC + (match_operand:AVX512_VEC 1 "reg_or_0_operand" "v,C,C") + (vec_duplicate:AVX512_VEC + (match_operand:<ssequartermode> 2 "nonimmediate_operand" "vm,xm,vm")) + (match_operand:SI 3 "const_int_operand" "n,n,n")))] + "TARGET_AVX512F + && (INTVAL (operands[3]) + == (GET_MODE_UNIT_SIZE (<MODE>mode) == 4 ? 0xFFF0 : 0xFC))" +{ + if (which_alternative == 0) + return "vinsert<shuffletype><extract_suf>\t{$0, %2, %1, %0|%0, %1, %2, 0}"; + switch (<MODE>mode) + { + case E_V8DFmode: + return "vmovapd\t{%2, %x0|%x0, %2}"; + case E_V16SFmode: + return "vmovaps\t{%2, %x0|%x0, %2}"; + case E_V8DImode: + return which_alternative == 2 ? "vmovdqa64\t{%2, %x0|%x0, %2}" + : "vmovdqa\t{%2, %x0|%x0, %2}"; + case E_V16SImode: + return which_alternative == 2 ? "vmovdqa32\t{%2, %x0|%x0, %2}" + : "vmovdqa\t{%2, %x0|%x0, %2}"; + default: + gcc_unreachable (); + } +} + [(set_attr "type" "sselog,ssemov,ssemov") + (set_attr "length_immediate" "1,0,0") + (set_attr "prefix" "evex,vex,evex") + (set_attr "mode" "<sseinsnmode>,<ssequarterinsnmode>,<ssequarterinsnmode>")]) + (define_insn "<mask_codefor><extract_type>_vinsert<shuffletype><extract_suf>_1<mask_name>" [(set (match_operand:AVX512_VEC 0 "register_operand" "=v") (vec_merge:AVX512_VEC |