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author | Ian Bolton <ian.bolton@arm.com> | 2013-10-24 14:31:45 +0000 |
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committer | Marcus Shawcroft <mshawcroft@gcc.gnu.org> | 2013-10-24 14:31:45 +0000 |
commit | 27bd251b64e5c1eb756d0de7e57c7b485a1c395b (patch) | |
tree | 9836a80ebbbdafeb6c37abde5beecfb3b6a94187 /gcc/config | |
parent | ac63f3057f0f5a6d517532269821266bcb406cd9 (diff) | |
download | gcc-27bd251b64e5c1eb756d0de7e57c7b485a1c395b.zip gcc-27bd251b64e5c1eb756d0de7e57c7b485a1c395b.tar.gz gcc-27bd251b64e5c1eb756d0de7e57c7b485a1c395b.tar.bz2 |
[AArch64,PATCH] Adjust preferred_reload_class of SP+C
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
From-SVN: r204018
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/aarch64/aarch64.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index d553af8..83d0c66 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -4263,6 +4263,24 @@ aarch64_preferred_reload_class (rtx x, reg_class_t regclass) && !aarch64_simd_imm_scalar_p (x, GET_MODE (x))) return NO_REGS; + /* Register eliminiation can result in a request for + SP+constant->FP_REGS. We cannot support such operations which + use SP as source and an FP_REG as destination, so reject out + right now. */ + if (! reg_class_subset_p (regclass, GENERAL_REGS) && GET_CODE (x) == PLUS) + { + rtx lhs = XEXP (x, 0); + + /* Look through a possible SUBREG introduced by ILP32. */ + if (GET_CODE (lhs) == SUBREG) + lhs = SUBREG_REG (lhs); + + gcc_assert (REG_P (lhs)); + gcc_assert (reg_class_subset_p (REGNO_REG_CLASS (REGNO (lhs)), + POINTER_REGS)); + return NO_REGS; + } + return regclass; } |