diff options
| author | Jakub Jelinek <jakub@redhat.com> | 2021-12-28 10:58:43 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2021-12-28 10:58:43 +0100 |
| commit | 242783c52c22ed96eae722b2fa9847711ac84699 (patch) | |
| tree | abe462b5c634f297590c066b2bfdf180021e898c /gcc/config | |
| parent | 472568f5d89eddbfcaff3887dab2a6c4c7fb8d84 (diff) | |
| download | gcc-242783c52c22ed96eae722b2fa9847711ac84699.zip gcc-242783c52c22ed96eae722b2fa9847711ac84699.tar.gz gcc-242783c52c22ed96eae722b2fa9847711ac84699.tar.bz2 | |
i386: Fix handling of SUBREGs in divv2sf3 [PR103842]
register_operand predicate allows not just REGs, but also SUBREGs of REGs,
and for the latter lowpart_subreg might FAIL when trying to create paradoxical
SUBREG in some cases. For the input operand fixed by force_reg on it first,
for the output operand handled by always dividing into a fresh V4SFmode temporary
and emit_move_insn into the destination afterwards, that is also beneficial for
combine.
2021-12-28 Jakub Jelinek <jakub@redhat.com>
PR target/103842
* config/i386/mmx.md (divv2sf3): Use force_reg on op1. Always perform
divv4sf3 into a pseudo and emit_move_insn into operands[0].
* g++.dg/opt/pr103842.C: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/mmx.md | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 5a57556..e394cba 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -529,17 +529,19 @@ (match_operand:V2SF 2 "register_operand")))] "TARGET_MMX_WITH_SSE" { - rtx op0 = lowpart_subreg (V4SFmode, operands[0], - GET_MODE (operands[0])); - rtx op1 = lowpart_subreg (V4SFmode, operands[1], - GET_MODE (operands[1])); + rtx op1 = lowpart_subreg (V4SFmode, force_reg (V2SFmode, operands[1]), + V2SFmode); rtx op2 = gen_rtx_VEC_CONCAT (V4SFmode, operands[2], force_reg (V2SFmode, CONST1_RTX (V2SFmode))); rtx tmp = gen_reg_rtx (V4SFmode); emit_insn (gen_rtx_SET (tmp, op2)); + rtx op0 = gen_reg_rtx (V4SFmode); + emit_insn (gen_divv4sf3 (op0, op1, tmp)); + + emit_move_insn (operands[0], lowpart_subreg (V2SFmode, op0, V4SFmode)); DONE; }) |