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author | Uros Bizjak <uros@gcc.gnu.org> | 2009-07-15 16:29:39 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2009-07-15 16:29:39 +0200 |
commit | 1fba7394b093bf541afea220196183355927cfb2 (patch) | |
tree | b09915ef1fa6197af1ce60475746133fd4fd16d3 /gcc/config | |
parent | fde4b6f5b4742d0521e63592fc93d2e5d4386f08 (diff) | |
download | gcc-1fba7394b093bf541afea220196183355927cfb2.zip gcc-1fba7394b093bf541afea220196183355927cfb2.tar.gz gcc-1fba7394b093bf541afea220196183355927cfb2.tar.bz2 |
sse.md (copysign<mode>3): Allocate registers only for operands[5] and operands[6].
* config/i386/sse.md (copysign<mode>3): Allocate registers only for
operands[5] and operands[6].
From-SVN: r149690
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/i386/sse.md | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 8980bf2..cde91e4 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1605,13 +1605,11 @@ (ior:SSEMODEF2P (match_dup 5) (match_dup 6)))] "SSE_VEC_FLOAT_MODE_P (<MODE>mode)" { - int i; - - for (i = 3; i < 7; i++) - operands[i] = gen_reg_rtx (<MODE>mode); - operands[3] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 1); operands[4] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 0); + + operands[5] = gen_reg_rtx (<MODE>mode); + operands[6] = gen_reg_rtx (<MODE>mode); }) ;; Also define scalar versions. These are used for abs, neg, and |