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authorUros Bizjak <uros@gcc.gnu.org>2009-07-15 16:29:39 +0200
committerUros Bizjak <uros@gcc.gnu.org>2009-07-15 16:29:39 +0200
commit1fba7394b093bf541afea220196183355927cfb2 (patch)
treeb09915ef1fa6197af1ce60475746133fd4fd16d3 /gcc/config
parentfde4b6f5b4742d0521e63592fc93d2e5d4386f08 (diff)
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sse.md (copysign<mode>3): Allocate registers only for operands[5] and operands[6].
* config/i386/sse.md (copysign<mode>3): Allocate registers only for operands[5] and operands[6]. From-SVN: r149690
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/i386/sse.md8
1 files changed, 3 insertions, 5 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 8980bf2..cde91e4 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1605,13 +1605,11 @@
(ior:SSEMODEF2P (match_dup 5) (match_dup 6)))]
"SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
{
- int i;
-
- for (i = 3; i < 7; i++)
- operands[i] = gen_reg_rtx (<MODE>mode);
-
operands[3] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 1);
operands[4] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 0);
+
+ operands[5] = gen_reg_rtx (<MODE>mode);
+ operands[6] = gen_reg_rtx (<MODE>mode);
})
;; Also define scalar versions. These are used for abs, neg, and