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authorRamana Radhakrishnan <ramana.radhakrishnan@arm.com>2011-01-18 15:28:08 +0000
committerRamana Radhakrishnan <ramana@gcc.gnu.org>2011-01-18 15:28:08 +0000
commit1eb458d14097fc0fb4d8a386d8b9fba292547360 (patch)
tree998caeb537a268ecdff17d8b68983839f5fbfe70 /gcc/config
parentd326f2eeb75a092397a9db5e92c65a803f088a0a (diff)
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cortex-a9.md (cortex-a9-neon.md): Actually include.
2011-01-18 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually include. (cortex_a9_dp): Handle neon types correctly. From-SVN: r168950
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/arm/cortex-a9.md12
1 files changed, 8 insertions, 4 deletions
diff --git a/gcc/config/arm/cortex-a9.md b/gcc/config/arm/cortex-a9.md
index 8c33667..b74ace8 100644
--- a/gcc/config/arm/cortex-a9.md
+++ b/gcc/config/arm/cortex-a9.md
@@ -79,10 +79,11 @@ cortex_a9_p1_e2 + cortex_a9_p0_e1 + cortex_a9_p1_e1")
;; which can go down E2 without any problem.
(define_insn_reservation "cortex_a9_dp" 2
(and (eq_attr "tune" "cortexa9")
- (ior (eq_attr "type" "alu")
- (ior (and (eq_attr "type" "alu_shift_reg, alu_shift")
- (eq_attr "insn" "mov"))
- (eq_attr "neon_type" "none"))))
+ (ior (and (eq_attr "type" "alu")
+ (eq_attr "neon_type" "none"))
+ (and (and (eq_attr "type" "alu_shift_reg, alu_shift")
+ (eq_attr "insn" "mov"))
+ (eq_attr "neon_type" "none"))))
"cortex_a9_p0_default|cortex_a9_p1_default")
;; An instruction using the shifter will go down E1.
@@ -263,3 +264,6 @@ cortex_a9_store3_4, cortex_a9_store1_2, cortex_a9_load3_4")
(and (eq_attr "tune" "cortexa9")
(eq_attr "type" "fdivd"))
"ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24")
+
+;; Include Neon pipeline description
+(include "cortex-a9-neon.md")