RISC-V: Add vector psabi checking.

This patch adds support to check function's argument or return is vector type
and throw warning if yes.

There're two exceptions,
  - The vector_size attribute.
  - The intrinsic functions.

Some cases that need to add -Wno-psabi to ignore the warning.

gcc/ChangeLog:

	* config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
	warning flag if func is not builtin
	* config/riscv/riscv.cc
	(riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
	(riscv_arg_has_vector): Determine whether the arg is vector type.
	(riscv_pass_in_vector_p): Check the vector type param is passed by value.
	(riscv_init_cumulative_args): The same as header.
	(riscv_get_arg_info): Add the checking.
	(riscv_function_value): Check the func return and set warning flag
	* config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
	determine whether warning psabi or not.

gcc/testsuite/ChangeLog:

	* g++.target/riscv/rvv/base/pr109244.C: Add the -Wno-psabi.
	* g++.target/riscv/rvv/base/pr109535.C: Same
	* gcc.target/riscv/rvv/base/binop_vx_constraint-120.c: Same
	* gcc.target/riscv/rvv/base/integer_compare_insn_shortcut.c: Same
	* gcc.target/riscv/rvv/base/mask_insn_shortcut.c: Same
	* gcc.target/riscv/rvv/base/misc_vreinterpret_vbool_vint.c: Same
	* gcc.target/riscv/rvv/base/pr110109-2.c: Same
	* gcc.target/riscv/rvv/base/scalar_move-9.c: Same
	* gcc.target/riscv/rvv/base/spill-10.c: Same
	* gcc.target/riscv/rvv/base/spill-11.c: Same
	* gcc.target/riscv/rvv/base/spill-9.c: Same
	* gcc.target/riscv/rvv/base/vlmul_ext-1.c: Same
	* gcc.target/riscv/rvv/base/zero_base_load_store_optimization.c: Same
	* gcc.target/riscv/rvv/base/zvfh-intrinsic.c: Same
	* gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c: Same
	* gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c: Same
	* gcc.target/riscv/rvv/vsetvl/vsetvl-1.c: Same
	* gcc.target/riscv/vector-abi-1.c: New test.
	* gcc.target/riscv/vector-abi-2.c: New test.
	* gcc.target/riscv/vector-abi-3.c: New test.
	* gcc.target/riscv/vector-abi-4.c: New test.
	* gcc.target/riscv/vector-abi-5.c: New test.
	* gcc.target/riscv/vector-abi-6.c: New test.

Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com>
Co-authored-by: Kito Cheng <kito.cheng@sifive.com>

3 files changed, 117 insertions, 2 deletions

diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 6db3a46..b23a9c1 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -303,4 +303,6 @@ th_mempair_output_move (rtx[4], bool, machine_mode, RTX_CODE);
 #endif
 
 extern bool riscv_use_divmod_expander (void);
+void riscv_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
+
 #endif /* ! GCC_RISCV_PROTOS_H */
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index de30bf4..dd5361c 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3795,6 +3795,99 @@ riscv_pass_fpr_pair (machine_mode mode, unsigned regno1,
 				   GEN_INT (offset2))));
 }
 
+/* Use the TYPE_SIZE to distinguish the type with vector_size attribute and
+   intrinsic vector type.  Because we can't get the decl for the params.  */
+
+static bool
+riscv_scalable_vector_type_p (const_tree type)
+{
+  tree size = TYPE_SIZE (type);
+  if (size && TREE_CODE (size) == INTEGER_CST)
+    return false;
+
+  /* For the data type like vint32m1_t, the size code is POLY_INT_CST.  */
+  return true;
+}
+
+static bool
+riscv_arg_has_vector (const_tree type)
+{
+  bool is_vector = false;
+
+  switch (TREE_CODE (type))
+    {
+    case RECORD_TYPE:
+      if (!COMPLETE_TYPE_P (type))
+	break;
+
+      for (tree f = TYPE_FIELDS (type); f; f = DECL_CHAIN (f))
+	if (TREE_CODE (f) == FIELD_DECL)
+	  {
+	    tree field_type = TREE_TYPE (f);
+	    if (!TYPE_P (field_type))
+	      break;
+
+	    /* Ignore it if it's fixed length vector.  */
+	    if (VECTOR_TYPE_P (field_type))
+	      is_vector = riscv_scalable_vector_type_p (field_type);
+	    else
+	      is_vector = riscv_arg_has_vector (field_type);
+	  }
+
+      break;
+
+    case VECTOR_TYPE:
+      is_vector = riscv_scalable_vector_type_p (type);
+      break;
+
+    default:
+      is_vector = false;
+      break;
+    }
+
+  return is_vector;
+}
+
+/* Pass the type to check whether it's a vector type or contains vector type.
+   Only check the value type and no checking for vector pointer type.  */
+
+static void
+riscv_pass_in_vector_p (const_tree type)
+{
+  static int warned = 0;
+
+  if (type && riscv_arg_has_vector (type) && !warned)
+    {
+      warning (OPT_Wpsabi, "ABI for the scalable vector type is currently in "
+	       "experimental stage and may changes in the upcoming version of "
+	       "GCC.");
+      warned = 1;
+    }
+}
+
+/* Initialize a variable CUM of type CUMULATIVE_ARGS
+   for a call to a function whose data type is FNTYPE.
+   For a library call, FNTYPE is 0.  */
+
+void
+riscv_init_cumulative_args (CUMULATIVE_ARGS *cum,
+			    tree fntype ATTRIBUTE_UNUSED,
+			    rtx libname ATTRIBUTE_UNUSED,
+			    tree fndecl,
+			    int caller ATTRIBUTE_UNUSED)
+{
+  memset (cum, 0, sizeof (*cum));
+
+  if (fndecl)
+    {
+      const tree_function_decl &fn
+	= FUNCTION_DECL_CHECK (fndecl)->function_decl;
+
+      if (fn.built_in_class == NOT_BUILT_IN)
+	  cum->rvv_psabi_warning = 1;
+    }
+}
+
 /* Fill INFO with information about a single argument, and return an
    RTL pattern to pass or return the argument.  CUM is the cumulative
    state for earlier arguments.  MODE is the mode of this argument and
@@ -3816,6 +3909,12 @@ riscv_get_arg_info (struct riscv_arg_info *info, const CUMULATIVE_ARGS *cum,
   info->gpr_offset = cum->num_gprs;
   info->fpr_offset = cum->num_fprs;
 
+  if (cum->rvv_psabi_warning)
+    {
+      /* Only check existing of vector type.  */
+      riscv_pass_in_vector_p (type);
+    }
+
   /* TODO: Currently, it will cause an ICE for --param
      riscv-autovec-preference=fixed-vlmax. So, we just return NULL_RTX here
      let GCC generate loads/stores. Ideally, we should either warn the user not
@@ -3973,7 +4072,18 @@ riscv_function_value (const_tree type, const_tree func, machine_mode mode)
     }
 
   memset (&args, 0, sizeof args);
-  return riscv_get_arg_info (&info, &args, mode, type, true, true);
+
+  const_tree arg_type = type;
+  if (func && DECL_RESULT (func))
+    {
+      const tree_function_decl &fn = FUNCTION_DECL_CHECK (func)->function_decl;
+      if (fn.built_in_class == NOT_BUILT_IN)
+	args.rvv_psabi_warning = 1;
+
+      arg_type = TREE_TYPE (DECL_RESULT (func));
+    }
+
+  return riscv_get_arg_info (&info, &args, mode, arg_type, true, true);
 }
 
 /* Implement TARGET_PASS_BY_REFERENCE. */
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 4541255..bfd9b75 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -677,6 +677,8 @@ typedef struct {
 
   /* Number of floating-point registers used so far, likewise.  */
   unsigned int num_fprs;
+
+  int rvv_psabi_warning;
 } CUMULATIVE_ARGS;
 
 /* Initialize a variable CUM of type CUMULATIVE_ARGS
@@ -684,7 +686,8 @@ typedef struct {
    For a library call, FNTYPE is 0.  */
 
 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
-  memset (&(CUM), 0, sizeof (CUM))
+  riscv_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (INDIRECT),     \
+			(N_NAMED_ARGS) != -1)
 
 #define EPILOGUE_USES(REGNO)	riscv_epilogue_uses (REGNO)