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author | Fei Gao <gaofei@eswincomputing.com> | 2023-06-05 20:09:03 -0600 |
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committer | Jeff Law <jlaw@ventanamicro.com> | 2023-06-05 20:10:17 -0600 |
commit | 17c796c7174bfc4a13a2aa74714cd295bf228668 (patch) | |
tree | 35da1213e8320b46e9598187f2e0980ffdea905c /gcc/config | |
parent | da2d75af6013bdbf347b0b1b1e88d8e4c2f771b2 (diff) | |
download | gcc-17c796c7174bfc4a13a2aa74714cd295bf228668.zip gcc-17c796c7174bfc4a13a2aa74714cd295bf228668.tar.gz gcc-17c796c7174bfc4a13a2aa74714cd295bf228668.tar.bz2 |
[RISC-V] correct machine mode in save-restore cfi RTL.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
for cfi reg/mem machmode
(riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
gcc/testsuite/ChangeLog:
* gcc.target/riscv/save-restore-cfi-2.c: New test to check machmode
for cfi reg/mem.
Diffstat (limited to 'gcc/config')
-rw-r--r-- | gcc/config/riscv/riscv.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index caa7858..3954c89 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -5370,10 +5370,10 @@ riscv_adjust_libcall_cfi_prologue () else offset = saved_size - ((regno - S2_REGNUM + 4) * UNITS_PER_WORD); - reg = gen_rtx_REG (SImode, regno); - mem = gen_frame_mem (SImode, plus_constant (Pmode, - stack_pointer_rtx, - offset)); + reg = gen_rtx_REG (Pmode, regno); + mem = gen_frame_mem (Pmode, plus_constant (Pmode, + stack_pointer_rtx, + offset)); insn = gen_rtx_SET (mem, reg); dwarf = alloc_reg_note (REG_CFA_OFFSET, insn, dwarf); @@ -5510,7 +5510,7 @@ riscv_adjust_libcall_cfi_epilogue () for (int regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++) if (BITSET_P (cfun->machine->frame.mask, regno - GP_REG_FIRST)) { - reg = gen_rtx_REG (SImode, regno); + reg = gen_rtx_REG (Pmode, regno); dwarf = alloc_reg_note (REG_CFA_RESTORE, reg, dwarf); } |