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| author | Andrea Corallo <andrea.corallo@arm.com> | 2021-12-06 11:39:03 +0100 |
|---|---|---|
| committer | Andrea Corallo <andrea.corallo@arm.com> | 2023-01-23 11:22:02 +0100 |
| commit | 14fab5fb9aa6432ca59fb02b7b82ac17093f4de2 (patch) | |
| tree | dc159627475e0243d89b300a265b9b7a23f112db /gcc/config | |
| parent | c91bb7b9fc87284f5382d9fb04db0cb10f6c1fe9 (diff) | |
| download | gcc-14fab5fb9aa6432ca59fb02b7b82ac17093f4de2.zip gcc-14fab5fb9aa6432ca59fb02b7b82ac17093f4de2.tar.gz gcc-14fab5fb9aa6432ca59fb02b7b82ac17093f4de2.tar.bz2 | |
[PATCH 3/15] arm: Add option -mbranch-protection
Add -mbranch-protection option. This option enables the
code-generation of pointer signing and authentication instructions in
function prologues and epilogues.
gcc/ChangeLog:
* config/arm/arm.cc (arm_configure_build_target): Parse and validate
-mbranch-protection option and initialize appropriate data structures.
* config/arm/arm.opt (-mbranch-protection): New option.
* doc/invoke.texi (Arm Options): Document it.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Richard Earnshaw <Richard.Earnshaw@arm.com>
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/arm/arm.cc | 11 | ||||
| -rw-r--r-- | gcc/config/arm/arm.opt | 4 |
2 files changed, 15 insertions, 0 deletions
diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index da84ba5..76c6f94 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -3259,6 +3259,17 @@ arm_configure_build_target (struct arm_build_target *target, tune_opts = strchr (opts->x_arm_tune_string, '+'); } + if (opts->x_arm_branch_protection_string) + { + aarch_validate_mbranch_protection (opts->x_arm_branch_protection_string); + + if (aarch_ra_sign_key != AARCH_KEY_A) + { + warning (0, "invalid key type for %<-mbranch-protection=%>"); + aarch_ra_sign_key = AARCH_KEY_A; + } + } + if (arm_selected_arch) { arm_initialize_isa (target->isa, arm_selected_arch->common.isa_bits); diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 16d8df8..260700f 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -323,6 +323,10 @@ mbranch-cost= Target RejectNegative Joined UInteger Var(arm_branch_cost) Init(-1) Cost to assume for a branch insn. +mbranch-protection= +Target RejectNegative Joined Var(arm_branch_protection_string) Save +Use branch-protection features. + mgeneral-regs-only Target RejectNegative Mask(GENERAL_REGS_ONLY) Save Generate code which uses the core registers only (r0-r14). |