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| author | Eric Botcazou <ebotcazou@adacore.com> | 2016-12-01 21:41:10 +0000 |
|---|---|---|
| committer | Eric Botcazou <ebotcazou@gcc.gnu.org> | 2016-12-01 21:41:10 +0000 |
| commit | f99bd883fb0d051ff2d7cebe217f2d2a8ad16bfd (patch) | |
| tree | d20e66569ff6ae298de16ceac627a080c6babed7 /gcc/config/sparc/sparc.c | |
| parent | 96ad5df6db65383330cba79ed823a0256e750033 (diff) | |
| download | gcc-f99bd883fb0d051ff2d7cebe217f2d2a8ad16bfd.zip gcc-f99bd883fb0d051ff2d7cebe217f2d2a8ad16bfd.tar.gz gcc-f99bd883fb0d051ff2d7cebe217f2d2a8ad16bfd.tar.bz2 | |
sparc.opt (mlra): New target option.
* config/sparc/sparc.opt (mlra): New target option.
* config/sparc/sparc.c (TARGET_LRA_P): Define to...
(sparc_lra_p): ...this. New function.
(D_MODES, DF_MODES): Add missing cast.
* config/sparc/sparc.md (*movsi_lo_sum, *movsi_high): Do not
provide these insns when flag_pic.
(sethi_di_medlow, losum_di_medlow, seth44, setm44, setl44, sethh,
setlm, sethm, setlo, embmedany_sethi, embmedany_losum,
embmedany_brsum, embmedany_textuhi, embmedany_texthi,
embmedany_textulo, embmedany_textlo): Likewise.
(sethi_di_medlow_embmedany_pic): Provide it only when flag_pic.
Co-Authored-By: David S. Miller <davem@davemloft.net>
From-SVN: r243135
Diffstat (limited to 'gcc/config/sparc/sparc.c')
| -rw-r--r-- | gcc/config/sparc/sparc.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index a70a0ad..e17552a 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -639,6 +639,7 @@ static const char *sparc_mangle_type (const_tree); static void sparc_trampoline_init (rtx, tree, rtx); static machine_mode sparc_preferred_simd_mode (machine_mode); static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass); +static bool sparc_lra_p (void); static bool sparc_print_operand_punct_valid_p (unsigned char); static void sparc_print_operand (FILE *, rtx, int); static void sparc_print_operand_address (FILE *, machine_mode, rtx); @@ -836,7 +837,7 @@ char sparc_hard_reg_printed[8]; #endif #undef TARGET_LRA_P -#define TARGET_LRA_P hook_bool_void_false +#define TARGET_LRA_P sparc_lra_p #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P sparc_legitimate_address_p @@ -4787,7 +4788,7 @@ enum sparc_mode_class { ((1 << (int) H_MODE) | (1 << (int) S_MODE) | (1 << (int) SF_MODE)) /* Modes for double-word and smaller quantities. */ -#define D_MODES (S_MODES | (1 << (int) D_MODE) | (1 << DF_MODE)) +#define D_MODES (S_MODES | (1 << (int) D_MODE) | (1 << (int) DF_MODE)) /* Modes for quad-word and smaller quantities. */ #define T_MODES (D_MODES | (1 << (int) T_MODE) | (1 << (int) TF_MODE)) @@ -4799,7 +4800,7 @@ enum sparc_mode_class { #define SF_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE)) /* Modes for double-float and smaller quantities. */ -#define DF_MODES (SF_MODES | (1 << (int) D_MODE) | (1 << DF_MODE)) +#define DF_MODES (SF_MODES | (1 << (int) D_MODE) | (1 << (int) DF_MODE)) /* Modes for quad-float and smaller quantities. */ #define TF_MODES (DF_MODES | (1 << (int) TF_MODE)) @@ -12248,6 +12249,14 @@ sparc_preferred_reload_class (rtx x, reg_class_t rclass) return rclass; } +/* Return true if we use LRA instead of reload pass. */ + +static bool +sparc_lra_p (void) +{ + return TARGET_LRA; +} + /* Output a wide multiply instruction in V8+ mode. INSN is the instruction, OPERANDS are its operands and OPCODE is the mnemonic to be used. */ |