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| author | Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | 2024-06-17 08:37:11 +0200 |
|---|---|---|
| committer | Stefan Schulze Frielinghaus <stefansf@linux.ibm.com> | 2024-06-17 08:37:11 +0200 |
| commit | 9965acb77cbd686283a9d0a867c80b1e710f46b9 (patch) | |
| tree | 253738455048e444fc7813a14d1282f8376385cf /gcc/config/s390 | |
| parent | 2ab143df110a40bd41b5368ef84819953bf971b1 (diff) | |
| download | gcc-9965acb77cbd686283a9d0a867c80b1e710f46b9.zip gcc-9965acb77cbd686283a9d0a867c80b1e710f46b9.tar.gz gcc-9965acb77cbd686283a9d0a867c80b1e710f46b9.tar.bz2 | |
s390: Extend two element float vector
This implements a V2SF -> V2DF extend.
gcc/ChangeLog:
* config/s390/vector.md (*vmrhf_half<mode>): New.
(extendv2sfv2df2): New.
gcc/testsuite/ChangeLog:
* gcc.target/s390/vector/vec-extend-3.c: New test.
Diffstat (limited to 'gcc/config/s390')
| -rw-r--r-- | gcc/config/s390/vector.md | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index a931a4b..40de0c7 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -895,6 +895,17 @@ "vmrhf\t%0,%1,%2"; [(set_attr "op_type" "VRR")]) +(define_insn "*vmrhf_half<mode>" + [(set (match_operand:V_HW_4 0 "register_operand" "=v") + (vec_select:V_HW_4 + (vec_concat:V_HW_4 (match_operand:<vec_halfnumelts> 1 "register_operand" "v") + (match_operand:<vec_halfnumelts> 2 "register_operand" "v")) + (parallel [(const_int 0) (const_int 2) + (const_int 1) (const_int 3)])))] + "TARGET_VX" + "vmrhf\t%0,%1,%2"; + [(set_attr "op_type" "VRR")]) + (define_insn "*vmrlf" [(set (match_operand:V_HW_4 0 "register_operand" "=v") (vec_select:V_HW_4 @@ -2394,6 +2405,23 @@ "vup<zero_extend>h<bhfgq>\t%0,%1" [(set_attr "op_type" "VRR")]) +(define_expand "extendv2sfv2df2" + [(set (match_dup 2) + (vec_select:V4SF + (vec_concat:V4SF (match_operand:V2SF 1 "register_operand") + (match_dup 1)) + (parallel [(const_int 0) (const_int 2) + (const_int 1) (const_int 3)]))) + (set (match_operand:V2DF 0 "register_operand") + (float_extend:V2DF + (vec_select:V2SF + (match_dup 2) + (parallel [(const_int 0) (const_int 2)]))))] + "TARGET_VX" +{ + operands[2] = gen_reg_rtx (V4SFmode); +}) + ;; vector unpack v16qi ; signed |