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authorJennifer Schmitz <jschmitz@nvidia.com>2024-10-24 05:11:31 -0700
committerJennifer Schmitz <jschmitz@nvidia.com>2024-10-25 08:54:14 +0200
commit0b22f0585348335369298c7d39afd171758eebe9 (patch)
tree7adeb0b713841c32af4e91fea3c71cc7c2f9a120 /gcc/config/riscv
parent6aba48a8cc128e54ee243d451ac9a843ff41c4f9 (diff)
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SVE intrinsics: Fold svaba with op1 all zeros to svabd.
Similar to https://gcc.gnu.org/pipermail/gcc-patches/2024-October/665780.html, this patch implements folding of svaba to svabd if op1 is all zeros, resulting in the use of UABD/SABD instructions instead of UABA/SABA. Tests were added to check the produced assembly for use of UABD/SABD, also for the _n case. The patch was bootstrapped and regtested on aarch64-linux-gnu, no regression. OK for mainline? Signed-off-by: Jennifer Schmitz <jschmitz@nvidia.com> gcc/ * config/aarch64/aarch64-sve-builtins-sve2.cc (svaba_impl::fold): Fold svaba to svabd if op1 is all zeros. gcc/testsuite/ * gcc.target/aarch64/sve2/acle/asm/aba_s32.c: New tests. * gcc.target/aarch64/sve2/acle/asm/aba_s64.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/aba_u32.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/aba_u64.c: Likewise.
Diffstat (limited to 'gcc/config/riscv')
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