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| author | Pan Li <pan2.li@intel.com> | 2024-04-20 08:29:38 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2024-04-20 08:32:17 +0800 |
| commit | 0cbeafe26513954b0aea3293d2f82d4863f10f1d (patch) | |
| tree | aeceddcc3f6609eb0d68fafe6fc2ffd56a47ce0f /gcc/config/riscv/riscv.md | |
| parent | 90ded7512e1c02058f21498daf58566844d1ac9f (diff) | |
| download | gcc-0cbeafe26513954b0aea3293d2f82d4863f10f1d.zip gcc-0cbeafe26513954b0aea3293d2f82d4863f10f1d.tar.gz gcc-0cbeafe26513954b0aea3293d2f82d4863f10f1d.tar.bz2 | |
Revert "RISC-V: Support one more overlap for wv instructions"
This reverts commit b3b2799b872bc4c1944629af9dfc8472c8ca5fe6.
Diffstat (limited to 'gcc/config/riscv/riscv.md')
| -rw-r--r-- | gcc/config/riscv/riscv.md | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index c2b4323..f092839 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -541,7 +541,7 @@ ;; Widening instructions have group-overlap constraints. Those are only ;; valid for certain register-group sizes. This attribute marks the ;; alternatives not matching the required register-group size as disabled. -(define_attr "group_overlap" "none,W21,W42,W84,W43,W86,W87,W0" +(define_attr "group_overlap" "none,W21,W42,W84,W43,W86,W87" (const_string "none")) (define_attr "group_overlap_valid" "no,yes" @@ -562,9 +562,9 @@ ;; According to RVV ISA: ;; The destination EEW is greater than the source EEW, the source EMUL is at least 1, - ;; and the overlap is in the highest-numbered part of the destination register group - ;; (e.g., when LMUL=8, vzext.vf4 v0, v6 is legal, but a source of v0, v2, or v4 is not). - ;; So the source operand should have LMUL >= 1. + ;; and the overlap is in the highest-numbered part of the destination register group + ;; (e.g., when LMUL=8, vzext.vf4 v0, v6 is legal, but a source of v0, v2, or v4 is not). + ;; So the source operand should have LMUL >= 1. (and (eq_attr "group_overlap" "W43") (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) != 4 && riscv_get_v_regno_alignment (GET_MODE (operands[3])) >= 1")) @@ -574,12 +574,6 @@ (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) != 8 && riscv_get_v_regno_alignment (GET_MODE (operands[3])) >= 1")) (const_string "no") - - ;; W21 supports highest-number overlap for source LMUL = 1. - ;; For 'wv' variant, we can also allow wide source operand overlaps dest operand. - (and (eq_attr "group_overlap" "W0") - (match_test "riscv_get_v_regno_alignment (GET_MODE (operands[0])) > 1")) - (const_string "no") ] (const_string "yes"))) |