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| author | Pan Li <pan2.li@intel.com> | 2023-08-17 09:17:08 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-08-17 15:34:09 +0800 |
| commit | 72fc7e9d6aefbc4de1d3827062e47277fca83ef5 (patch) | |
| tree | 2a8fb1a8430d758aa49ca8afa1878154b397965d /gcc/config/riscv/riscv-vector-builtins-bases.cc | |
| parent | 3d18a528bfd05f0bfdb27f52c2f6c2445f15e4ca (diff) | |
| download | gcc-72fc7e9d6aefbc4de1d3827062e47277fca83ef5.zip gcc-72fc7e9d6aefbc4de1d3827062e47277fca83ef5.tar.gz gcc-72fc7e9d6aefbc4de1d3827062e47277fca83ef5.tar.bz2 | |
RISC-V: Support RVV VFNCVT.XU.F.W rounding mode intrinsic API
This patch would like to support the rounding mode API for the
VFNCVT.XU.F.W as the below samples.
* __riscv_vfncvt_xu_f_w_u16mf2_rm
* __riscv_vfncvt_xu_f_w_u16mf2_rm_m
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins-bases.cc
(vfncvt_xu_frm_obj): New declaration.
(BASE): Ditto.
* config/riscv/riscv-vector-builtins-bases.h: Ditto.
* config/riscv/riscv-vector-builtins-functions.def
(vfncvt_xu_frm): New intrinsic function def.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-ncvt-xu.c: New test.
Diffstat (limited to 'gcc/config/riscv/riscv-vector-builtins-bases.cc')
| -rw-r--r-- | gcc/config/riscv/riscv-vector-builtins-bases.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins-bases.cc b/gcc/config/riscv/riscv-vector-builtins-bases.cc index 2f40eea..acadec2 100644 --- a/gcc/config/riscv/riscv-vector-builtins-bases.cc +++ b/gcc/config/riscv/riscv-vector-builtins-bases.cc @@ -2509,6 +2509,7 @@ static CONSTEXPR const vfwcvt_f vfwcvt_f_obj; static CONSTEXPR const vfncvt_x<UNSPEC_VFCVT> vfncvt_x_obj; static CONSTEXPR const vfncvt_x<UNSPEC_VFCVT, HAS_FRM> vfncvt_x_frm_obj; static CONSTEXPR const vfncvt_x<UNSPEC_UNSIGNED_VFCVT> vfncvt_xu_obj; +static CONSTEXPR const vfncvt_x<UNSPEC_UNSIGNED_VFCVT, HAS_FRM> vfncvt_xu_frm_obj; static CONSTEXPR const vfncvt_rtz_x<FIX> vfncvt_rtz_x_obj; static CONSTEXPR const vfncvt_rtz_x<UNSIGNED_FIX> vfncvt_rtz_xu_obj; static CONSTEXPR const vfncvt_f vfncvt_f_obj; @@ -2764,6 +2765,7 @@ BASE (vfwcvt_f) BASE (vfncvt_x) BASE (vfncvt_x_frm) BASE (vfncvt_xu) +BASE (vfncvt_xu_frm) BASE (vfncvt_rtz_x) BASE (vfncvt_rtz_xu) BASE (vfncvt_f) |