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| author | Jie Mei <jie.mei@oss.cipunited.com> | 2023-06-19 16:29:51 +0800 |
|---|---|---|
| committer | YunQiang Su <yunqiang.su@cipunited.com> | 2023-07-03 11:34:45 +0800 |
| commit | d102aa2d30c6dc3bd88170dedd16b07e7b7709e6 (patch) | |
| tree | dbf97af9101b0dd5f4db00a887ba5bc5550463e4 /gcc/config/mips/mips.h | |
| parent | 926f2d09d9c1ffb8286583175ee4bb605903fbce (diff) | |
| download | gcc-d102aa2d30c6dc3bd88170dedd16b07e7b7709e6.zip gcc-d102aa2d30c6dc3bd88170dedd16b07e7b7709e6.tar.gz gcc-d102aa2d30c6dc3bd88170dedd16b07e7b7709e6.tar.bz2 | |
MIPS: Add MOVx instructions support for mips16e2
This patch adds MOVx instructions from mips16e2
(movn,movz,movtn,movtz) with corresponding tests.
gcc/ChangeLog:
* config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
* config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
(*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
(*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
(*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
* config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
gcc/testsuite/ChangeLog:
* gcc.target/mips/mips16e2-cmov.c: Added tests for MOVx instructions.
Diffstat (limited to 'gcc/config/mips/mips.h')
| -rw-r--r-- | gcc/config/mips/mips.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index c678167..a94b253 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1081,6 +1081,7 @@ struct mips_cpu_info { ST Loongson 2E/2F. */ #define ISA_HAS_CONDMOVE (ISA_HAS_FP_CONDMOVE \ || TARGET_MIPS5900 \ + || ISA_HAS_MIPS16E2 \ || TARGET_LOONGSON_2EF) /* ISA has LDC1 and SDC1. */ |