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author | Xi Ruoyao <xry111@xry111.site> | 2024-06-09 14:43:48 +0800 |
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committer | Xi Ruoyao <xry111@xry111.site> | 2024-06-12 20:38:41 +0800 |
commit | d0da347a1dd6e57cb0e0c55fd654d81dde545cf8 (patch) | |
tree | 300ab3ffe38b3d59909f105a498750978d094e9d /gcc/config/loongarch | |
parent | 53c703888eb51314f762c8998dc9215871b12722 (diff) | |
download | gcc-d0da347a1dd6e57cb0e0c55fd654d81dde545cf8.zip gcc-d0da347a1dd6e57cb0e0c55fd654d81dde545cf8.tar.gz gcc-d0da347a1dd6e57cb0e0c55fd654d81dde545cf8.tar.bz2 |
LoongArch: Use bstrins for "value & (-1u << const)"
A move/bstrins pair is as fast as a (addi.w|lu12i.w|lu32i.d|lu52i.d)/and
pair, and twice fast as a srli/slli pair. When the src reg and the dst
reg happens to be the same, the move instruction can be optimized away.
gcc/ChangeLog:
* config/loongarch/predicates.md (high_bitmask_operand): New
predicate.
* config/loongarch/constraints.md (Yy): New constriant.
* config/loongarch/loongarch.md (and<mode>3_align): New
define_insn_and_split.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/bstrins-1.c: New test.
* gcc.target/loongarch/bstrins-2.c: New test.
Diffstat (limited to 'gcc/config/loongarch')
-rw-r--r-- | gcc/config/loongarch/constraints.md | 5 | ||||
-rw-r--r-- | gcc/config/loongarch/loongarch.md | 17 | ||||
-rw-r--r-- | gcc/config/loongarch/predicates.md | 4 |
3 files changed, 26 insertions, 0 deletions
diff --git a/gcc/config/loongarch/constraints.md b/gcc/config/loongarch/constraints.md index f07d316..12cf5e2 100644 --- a/gcc/config/loongarch/constraints.md +++ b/gcc/config/loongarch/constraints.md @@ -94,6 +94,7 @@ ;; "A constant @code{move_operand} that can be safely loaded using ;; @code{la}." ;; "Yx" +;; "Yy" ;; "Z" - ;; "ZC" ;; "A memory operand whose address is formed by a base register and offset @@ -291,6 +292,10 @@ "@internal" (match_operand 0 "low_bitmask_operand")) +(define_constraint "Yy" + "@internal" + (match_operand 0 "high_bitmask_operand")) + (define_constraint "YI" "@internal A replicated vector const in which the replicated value is in the range diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 5c80c16..25c1d32 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -1542,6 +1542,23 @@ [(set_attr "move_type" "pick_ins") (set_attr "mode" "<MODE>")]) +(define_insn_and_split "and<mode>3_align" + [(set (match_operand:GPR 0 "register_operand" "=r") + (and:GPR (match_operand:GPR 1 "register_operand" "r") + (match_operand:GPR 2 "high_bitmask_operand" "Yy")))] + "" + "#" + "" + [(set (match_dup 0) (match_dup 1)) + (set (zero_extract:GPR (match_dup 0) (match_dup 2) (const_int 0)) + (const_int 0))] +{ + int len; + + len = low_bitmask_len (<MODE>mode, ~INTVAL (operands[2])); + operands[2] = GEN_INT (len); +}) + (define_insn_and_split "*bstrins_<mode>_for_mask" [(set (match_operand:GPR 0 "register_operand" "=r") (and:GPR (match_operand:GPR 1 "register_operand" "r") diff --git a/gcc/config/loongarch/predicates.md b/gcc/config/loongarch/predicates.md index eba7f24..58e406e 100644 --- a/gcc/config/loongarch/predicates.md +++ b/gcc/config/loongarch/predicates.md @@ -293,6 +293,10 @@ (and (match_code "const_int") (match_test "low_bitmask_len (mode, INTVAL (op)) > 12"))) +(define_predicate "high_bitmask_operand" + (and (match_code "const_int") + (match_test "low_bitmask_len (mode, ~INTVAL (op)) > 0"))) + (define_predicate "d_operand" (and (match_code "reg") (match_test "GP_REG_P (REGNO (op))"))) |