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authorJiahao Xu <xujiahao@loongson.cn>2024-01-16 10:32:31 +0800
committerLulu Cheng <chenglulu@loongson.cn>2024-01-26 16:11:29 +0800
commitdddafe948230b4895f8d4371eee7996fb2dba44a (patch)
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parent9e7947a66737c43cdec026b1f9c8149c5eba6c40 (diff)
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LoongArch: Define LOGICAL_OP_NON_SHORT_CIRCUIT
Define LOGICAL_OP_NON_SHORT_CIRCUIT as 0, for a short-circuit branch, use the short-circuit operation instead of the non-short-circuit operation. SPEC2017 performance evaluation shows 1% performance improvement for fprate GEOMEAN and no obvious regression for others. Especially, 526.blender_r +10.6% on 3A6000. This modification will introduce the following FAIL items: FAIL: gcc.dg/tree-ssa/copy-headers-8.c scan-tree-dump-times ch2 "Conditional combines static and invariant" 1 FAIL: gcc.dg/tree-ssa/copy-headers-8.c scan-tree-dump-times ch2 "Will duplicate bb" 2 FAIL: gcc.dg/tree-ssa/update-threading.c scan-tree-dump-times optimized "Invalid sum" 0 gcc/ChangeLog: * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define. gcc/testsuite/ChangeLog: * gcc.target/loongarch/short-circuit.c: New test.
Diffstat (limited to 'gcc/config/loongarch/loongarch.h')
-rw-r--r--gcc/config/loongarch/loongarch.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
index 4e6ede9..8b453ab 100644
--- a/gcc/config/loongarch/loongarch.h
+++ b/gcc/config/loongarch/loongarch.h
@@ -869,6 +869,7 @@ typedef struct {
1 is the default; other values are interpreted relative to that. */
#define BRANCH_COST(speed_p, predictable_p) la_branch_cost
+#define LOGICAL_OP_NON_SHORT_CIRCUIT 0
/* Return the asm template for a conditional branch instruction.
OPCODE is the opcode's mnemonic and OPERANDS is the asm template for