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author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2016-06-03 08:43:28 +0000 |
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committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2016-06-03 08:43:28 +0000 |
commit | b82617e340b663701f39e3ab40c44b0b358cf1e3 (patch) | |
tree | 19acd4e511bb4fe3c67d67e25fd81ebae2c7cc73 /gcc/config/arm | |
parent | de3ba371c543ea298dbe9cd913a729b6f73ca22a (diff) | |
download | gcc-b82617e340b663701f39e3ab40c44b0b358cf1e3.zip gcc-b82617e340b663701f39e3ab40c44b0b358cf1e3.tar.gz gcc-b82617e340b663701f39e3ab40c44b0b358cf1e3.tar.bz2 |
[ARM][obvious] Fix typos in *thumb1_mulsi3 comment
* config/arm/thumb1.md (*thumb1_mulsi3): Fix typos in comment.
From-SVN: r237058
Diffstat (limited to 'gcc/config/arm')
-rw-r--r-- | gcc/config/arm/thumb1.md | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md index c5b59bd..035641b 100644 --- a/gcc/config/arm/thumb1.md +++ b/gcc/config/arm/thumb1.md @@ -142,11 +142,11 @@ (set_attr "type" "alus_sreg")] ) -; Unfortunately with the Thumb the '&'/'0' trick can fails when operands -; 1 and 2; are the same, because reload will make operand 0 match -; operand 1 without realizing that this conflicts with operand 2. We fix -; this by adding another alternative to match this case, and then `reload' -; it ourselves. This alternative must come first. +;; Unfortunately on Thumb the '&'/'0' trick can fail when operands +;; 1 and 2 are the same, because reload will make operand 0 match +;; operand 1 without realizing that this conflicts with operand 2. We fix +;; this by adding another alternative to match this case, and then `reload' +;; it ourselves. This alternative must come first. (define_insn "*thumb_mulsi3" [(set (match_operand:SI 0 "register_operand" "=&l,&l,&l") (mult:SI (match_operand:SI 1 "register_operand" "%l,*h,0") |