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-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/arm/thumb1.md10
2 files changed, 9 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c2eeb90..635634b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2016-06-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/arm/thumb1.md (*thumb1_mulsi3): Fix typos in comment.
+
2016-06-03 Jakub Jelinek <jakub@redhat.com>
PR middle-end/71387
diff --git a/gcc/config/arm/thumb1.md b/gcc/config/arm/thumb1.md
index c5b59bd..035641b 100644
--- a/gcc/config/arm/thumb1.md
+++ b/gcc/config/arm/thumb1.md
@@ -142,11 +142,11 @@
(set_attr "type" "alus_sreg")]
)
-; Unfortunately with the Thumb the '&'/'0' trick can fails when operands
-; 1 and 2; are the same, because reload will make operand 0 match
-; operand 1 without realizing that this conflicts with operand 2. We fix
-; this by adding another alternative to match this case, and then `reload'
-; it ourselves. This alternative must come first.
+;; Unfortunately on Thumb the '&'/'0' trick can fail when operands
+;; 1 and 2 are the same, because reload will make operand 0 match
+;; operand 1 without realizing that this conflicts with operand 2. We fix
+;; this by adding another alternative to match this case, and then `reload'
+;; it ourselves. This alternative must come first.
(define_insn "*thumb_mulsi3"
[(set (match_operand:SI 0 "register_operand" "=&l,&l,&l")
(mult:SI (match_operand:SI 1 "register_operand" "%l,*h,0")