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author | Bernd Schmidt <bernds@codesourcery.com> | 2010-08-02 09:53:58 +0000 |
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committer | Bernd Schmidt <bernds@gcc.gnu.org> | 2010-08-02 09:53:58 +0000 |
commit | 0bd44ba2e1130ed35a194ee32e033af7efe14495 (patch) | |
tree | 3bcdbfdf83f159cecb2ebf5d75f65fe951261d4a /gcc/config/arm/thumb2.md | |
parent | 906668bb6f8c3f1eb4046dec89e9664554481eaa (diff) | |
download | gcc-0bd44ba2e1130ed35a194ee32e033af7efe14495.zip gcc-0bd44ba2e1130ed35a194ee32e033af7efe14495.tar.gz gcc-0bd44ba2e1130ed35a194ee32e033af7efe14495.tar.bz2 |
thumb2.md (thumb2_movdi, [...]): Delete patterns.
* config/arm/thumb2.md (thumb2_movdi, thumb2_movsf_soft_insn,
thumb2_movdf_soft_insn): Delete patterns.
* config/arm/arm.md (arm_pool_range, thumb2_pool_range,
arm_neg_pool_range, thumb2_neg_pool_range): New attributes.
(pool_range, neg_pool_range): Use them to define defaults.
(movdi, arm_movsf_soft_insn, arm_movdf_soft_insn): Define them
and allow for TARGET_32BIT.
From-SVN: r162814
Diffstat (limited to 'gcc/config/arm/thumb2.md')
-rw-r--r-- | gcc/config/arm/thumb2.md | 65 |
1 files changed, 1 insertions, 64 deletions
diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 55bb41ff..46767d4 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -200,29 +200,6 @@ (set_attr "length" "10,8")] ) -(define_insn "*thumb2_movdi" - [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m") - (match_operand:DI 1 "di_operand" "rDa,Db,Dc,mi,r"))] - "TARGET_THUMB2 - && !(TARGET_HARD_FLOAT && (TARGET_MAVERICK || TARGET_VFP)) - && !TARGET_IWMMXT" - "* - switch (which_alternative) - { - case 0: - case 1: - case 2: - return \"#\"; - default: - return output_move_double (operands); - } - " - [(set_attr "length" "8,12,16,8,8") - (set_attr "type" "*,*,*,load2,store2") - (set_attr "pool_range" "*,*,*,4096,*") - (set_attr "neg_pool_range" "*,*,*,0,*")] -) - ;; We have two alternatives here for memory loads (and similarly for stores) ;; to reflect the fact that the permissible constant pool ranges differ ;; between ldr instructions taking low regs and ldr instructions taking high @@ -269,7 +246,7 @@ ;; Thumb-2 always has load/store halfword instructions, so we can avoid a lot ;; of the messiness associated with the ARM patterns. (define_insn "*thumb2_movhi_insn" - [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r") + [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r") (match_operand:HI 1 "general_operand" "rI,n,r,m"))] "TARGET_THUMB2" "@ @@ -283,46 +260,6 @@ (set_attr "neg_pool_range" "*,*,*,250")] ) -(define_insn "*thumb2_movsf_soft_insn" - [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m") - (match_operand:SF 1 "general_operand" "r,mE,r"))] - "TARGET_THUMB2 - && TARGET_SOFT_FLOAT - && (GET_CODE (operands[0]) != MEM - || register_operand (operands[1], SFmode))" - "@ - mov%?\\t%0, %1 - ldr%?\\t%0, %1\\t%@ float - str%?\\t%1, %0\\t%@ float" - [(set_attr "predicable" "yes") - (set_attr "type" "*,load1,store1") - (set_attr "pool_range" "*,4096,*") - (set_attr "neg_pool_range" "*,0,*")] -) - -(define_insn "*thumb2_movdf_soft_insn" - [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m") - (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))] - "TARGET_THUMB2 && TARGET_SOFT_FLOAT - && ( register_operand (operands[0], DFmode) - || register_operand (operands[1], DFmode))" - "* - switch (which_alternative) - { - case 0: - case 1: - case 2: - return \"#\"; - default: - return output_move_double (operands); - } - " - [(set_attr "length" "8,12,16,8,8") - (set_attr "type" "*,*,*,load2,store2") - (set_attr "pool_range" "*,*,*,1020,*") - (set_attr "neg_pool_range" "*,*,*,0,*")] -) - (define_insn "*thumb2_cmpsi_shiftsi" [(set (reg:CC CC_REGNUM) (compare:CC (match_operand:SI 0 "s_register_operand" "r") |