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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2017-06-21 15:26:21 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2017-06-21 15:26:21 +0000
commit2c0113fd8ac55b9cf93c3a1c660264112edb0462 (patch)
treeebce3ffc803a5a25133610f3f9eb8f3f68f1ba49 /gcc/config/aarch64/atomics.md
parent5e9d501c7db51bb2fdbb3678db4f74ee6b73e3b8 (diff)
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[AArch64] Fix atomic_cmp_exchange_zero_reg_1.c with +lse
* config/aarch64/atomics.md (aarch64_compare_and_swap<mode>_lse, SHORT): Relax operand 3 to aarch64_reg_or_zero and constraint to Z. (aarch64_compare_and_swap<mode>_lse, GPI): Likewise. (aarch64_atomic_cas<mode>, SHORT): Likewise for operand 2. (aarch64_atomic_cas<mode>, GPI): Likewise. From-SVN: r249457
Diffstat (limited to 'gcc/config/aarch64/atomics.md')
-rw-r--r--gcc/config/aarch64/atomics.md8
1 files changed, 4 insertions, 4 deletions
diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md
index 27fc193..32b7169 100644
--- a/gcc/config/aarch64/atomics.md
+++ b/gcc/config/aarch64/atomics.md
@@ -94,7 +94,7 @@
(set (match_dup 1)
(unspec_volatile:SHORT
[(match_operand:SI 2 "aarch64_plus_operand" "rI") ;; expected
- (match_operand:SHORT 3 "register_operand" "r") ;; desired
+ (match_operand:SHORT 3 "aarch64_reg_or_zero" "rZ") ;; desired
(match_operand:SI 4 "const_int_operand") ;; is_weak
(match_operand:SI 5 "const_int_operand") ;; mod_s
(match_operand:SI 6 "const_int_operand")] ;; mod_f
@@ -119,7 +119,7 @@
(set (match_dup 1)
(unspec_volatile:GPI
[(match_operand:GPI 2 "aarch64_plus_operand" "rI") ;; expect
- (match_operand:GPI 3 "register_operand" "r") ;; desired
+ (match_operand:GPI 3 "aarch64_reg_or_zero" "rZ") ;; desired
(match_operand:SI 4 "const_int_operand") ;; is_weak
(match_operand:SI 5 "const_int_operand") ;; mod_s
(match_operand:SI 6 "const_int_operand")] ;; mod_f
@@ -616,7 +616,7 @@
(set (match_dup 1)
(unspec_volatile:SHORT
[(match_dup 0)
- (match_operand:SHORT 2 "register_operand" "r") ;; value.
+ (match_operand:SHORT 2 "aarch64_reg_or_zero" "rZ") ;; value.
(match_operand:SI 3 "const_int_operand" "")] ;; model.
UNSPECV_ATOMIC_CAS))]
"TARGET_LSE && reload_completed"
@@ -640,7 +640,7 @@
(set (match_dup 1)
(unspec_volatile:GPI
[(match_dup 0)
- (match_operand:GPI 2 "register_operand" "r") ;; value.
+ (match_operand:GPI 2 "aarch64_reg_or_zero" "rZ") ;; value.
(match_operand:SI 3 "const_int_operand" "")] ;; model.
UNSPECV_ATOMIC_CAS))]
"TARGET_LSE && reload_completed"