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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2022-11-15 09:50:39 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2022-11-15 09:50:39 +0000 |
| commit | 0431e8ae5bdb854bda5f9005e41c8c4d03f6d74e (patch) | |
| tree | b65df33fbe1c4b36a63276d5e48037ac3c25fa78 /gcc/config/aarch64/atomics.md | |
| parent | 9a4129f5c5a697ad7726687d5932eef90feec53b (diff) | |
| download | gcc-0431e8ae5bdb854bda5f9005e41c8c4d03f6d74e.zip gcc-0431e8ae5bdb854bda5f9005e41c8c4d03f6d74e.tar.gz gcc-0431e8ae5bdb854bda5f9005e41c8c4d03f6d74e.tar.bz2 | |
aarch64: Enable the use of LDAPR for load-acquire semantics
This patch enables the use of LDAPR for load-acquire semantics.
2022-11-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
gcc/ChangeLog:
* config/aarch64/aarch64.h (AARCH64_ISA_RCPC): New Macro.
(TARGET_RCPC): New Macro.
* config/aarch64/atomics.md (atomic_load<mode>): Change into an expand.
(aarch64_atomic_load<mode>_rcpc): New define_insn for ldapr.
(aarch64_atomic_load<mode>): Rename of old define_insn for ldar.
* config/aarch64/iterators.md (UNSPEC_LDAP): New unspec enum value.
* doc/invoke.texi (rcpc): Ammend documentation to mention the effects
on code generation.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ldapr.c: New test.
Diffstat (limited to 'gcc/config/aarch64/atomics.md')
| -rw-r--r-- | gcc/config/aarch64/atomics.md | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/gcc/config/aarch64/atomics.md b/gcc/config/aarch64/atomics.md index bc95f6d..dc5f52e 100644 --- a/gcc/config/aarch64/atomics.md +++ b/gcc/config/aarch64/atomics.md @@ -657,7 +657,38 @@ } ) -(define_insn "atomic_load<mode>" +(define_expand "atomic_load<mode>" + [(match_operand:ALLI 0 "register_operand" "=r") + (match_operand:ALLI 1 "aarch64_sync_memory_operand" "Q") + (match_operand:SI 2 "const_int_operand")] + "" + { + /* If TARGET_RCPC and this is an ACQUIRE load, then expand to a pattern + using UNSPECV_LDAP. */ + enum memmodel model = memmodel_from_int (INTVAL (operands[2])); + if (TARGET_RCPC + && (is_mm_acquire (model) + || is_mm_acq_rel (model))) + emit_insn (gen_aarch64_atomic_load<mode>_rcpc (operands[0], operands[1], + operands[2])); + else + emit_insn (gen_aarch64_atomic_load<mode> (operands[0], operands[1], + operands[2])); + DONE; + } +) + +(define_insn "aarch64_atomic_load<mode>_rcpc" + [(set (match_operand:ALLI 0 "register_operand" "=r") + (unspec_volatile:ALLI + [(match_operand:ALLI 1 "aarch64_sync_memory_operand" "Q") + (match_operand:SI 2 "const_int_operand")] ;; model + UNSPECV_LDAP))] + "TARGET_RCPC" + "ldapr<atomic_sfx>\t%<w>0, %1" +) + +(define_insn "aarch64_atomic_load<mode>" [(set (match_operand:ALLI 0 "register_operand" "=r") (unspec_volatile:ALLI [(match_operand:ALLI 1 "aarch64_sync_memory_operand" "Q") |