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author | Richard Sandiford <richard.sandiford@arm.com> | 2021-11-17 12:28:44 +0000 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2021-11-17 12:28:44 +0000 |
commit | 7061300025188d57e715c1593b8dae598c87b3c5 (patch) | |
tree | 98d1c757d4566fba3fd619ee171e41bfb94920bd /gcc/config/aarch64/aarch64-sve.md | |
parent | bf5f41e4fcc396b359f096231a37a3cb411cc9df (diff) | |
download | gcc-7061300025188d57e715c1593b8dae598c87b3c5.zip gcc-7061300025188d57e715c1593b8dae598c87b3c5.tar.gz gcc-7061300025188d57e715c1593b8dae598c87b3c5.tar.bz2 |
Add IFN_COND_FMIN/FMAX functions
This patch adds conditional forms of FMAX and FMIN, following
the pattern for existing conditional binary functions.
gcc/
* doc/md.texi (cond_fmin@var{mode}, cond_fmax@var{mode}): Document.
* optabs.def (cond_fmin_optab, cond_fmax_optab): New optabs.
* internal-fn.def (COND_FMIN, COND_FMAX): New functions.
* internal-fn.c (first_commutative_argument): Handle them.
(FOR_EACH_COND_FN_PAIR): Likewise.
* match.pd (UNCOND_BINARY, COND_BINARY): Likewise.
* config/aarch64/aarch64-sve.md (cond_<fmaxmin><mode>): New
pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/cond_fmaxnm_5.c: New test.
* gcc.target/aarch64/sve/cond_fmaxnm_5_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fmaxnm_6.c: Likewise.
* gcc.target/aarch64/sve/cond_fmaxnm_6_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fmaxnm_7.c: Likewise.
* gcc.target/aarch64/sve/cond_fmaxnm_7_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fmaxnm_8.c: Likewise.
* gcc.target/aarch64/sve/cond_fmaxnm_8_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_5.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_5_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_6.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_6_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_7.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_7_run.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_8.c: Likewise.
* gcc.target/aarch64/sve/cond_fminnm_8_run.c: Likewise.
Diffstat (limited to 'gcc/config/aarch64/aarch64-sve.md')
-rw-r--r-- | gcc/config/aarch64/aarch64-sve.md | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index 5de479e..0f5bf5e 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -6287,7 +6287,7 @@ ;; ------------------------------------------------------------------------- ;; Unpredicated fmax/fmin (the libm functions). The optabs for the -;; smin/smax rtx codes are handled in the generic section above. +;; smax/smin rtx codes are handled in the generic section above. (define_expand "<fmaxmin><mode>3" [(set (match_operand:SVE_FULL_F 0 "register_operand") (unspec:SVE_FULL_F @@ -6302,6 +6302,23 @@ } ) +;; Predicated fmax/fmin (the libm functions). The optabs for the +;; smax/smin rtx codes are handled in the generic section above. +(define_expand "cond_<fmaxmin><mode>" + [(set (match_operand:SVE_FULL_F 0 "register_operand") + (unspec:SVE_FULL_F + [(match_operand:<VPRED> 1 "register_operand") + (unspec:SVE_FULL_F + [(match_dup 1) + (const_int SVE_RELAXED_GP) + (match_operand:SVE_FULL_F 2 "register_operand") + (match_operand:SVE_FULL_F 3 "aarch64_sve_float_maxmin_operand")] + SVE_COND_FP_MAXMIN_PUBLIC) + (match_operand:SVE_FULL_F 4 "aarch64_simd_reg_or_zero")] + UNSPEC_SEL))] + "TARGET_SVE" +) + ;; Predicated floating-point maximum/minimum. (define_insn "@aarch64_pred_<optab><mode>" [(set (match_operand:SVE_FULL_F 0 "register_operand" "=w, w, ?&w, ?&w") |