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| author | Uros Bizjak <ubizjak@gmail.com> | 2024-09-27 15:58:17 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2024-09-27 15:59:38 +0200 |
| commit | a72108920805a024b6bbee5acdd32914382c47a1 (patch) | |
| tree | f1fe828ca6e4c69affd251e70e6573166bbf1eaa /gcc/common | |
| parent | cd430b1fd95dce5868ce6a8063119d253ea2f995 (diff) | |
| download | gcc-a72108920805a024b6bbee5acdd32914382c47a1.zip gcc-a72108920805a024b6bbee5acdd32914382c47a1.tar.gz gcc-a72108920805a024b6bbee5acdd32914382c47a1.tar.bz2 | |
i386: Modernize AMD processor types
Use iterative PTA definitions for members of the same AMD processor family.
Also, fix a couple of related M_CPU_TYPE/M_CPU_SUBTYPE inconsistencies.
No functional changes intended.
gcc/ChangeLog:
* config/i386/i386.h: Add PTA_BDVER1, PTA_BDVER2, PTA_BDVER3,
PTA_BDVER4, PTA_BTVER1 and PTA_BTVER2.
* common/config/i386/i386-common.cc (processor_alias_table)
<"bdver1">: Use PTA_BDVER1.
<"bdver2">: Use PTA_BDVER2.
<"bdver3">: Use PTA_BDVER3.
<"bdver4">: Use PTA_BDVER4.
<"btver1">: Use PTA_BTVER1. Use M_CPU_TYPE (AMD_BTVER1).
<"btver2">: Use PTA_BTVER2.
<"shanghai>: Use M_CPU_SUBTYPE (AMDFAM10H_SHANGHAI).
<"istanbul>: Use M_CPU_SUBTYPE (AMDFAM10H_ISTANBUL).
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/i386/i386-common.cc | 46 |
1 files changed, 11 insertions, 35 deletions
diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index fb74431..3f2fc59 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -2348,34 +2348,16 @@ const pta processor_alias_table[] = | PTA_SSE3 | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_PRFCHW | PTA_FXSR, M_CPU_SUBTYPE (AMDFAM10H_BARCELONA), P_PROC_DYNAMIC}, {"bdver1", PROCESSOR_BDVER1, CPU_BDVER1, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_FMA4 - | PTA_XOP | PTA_LWP | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE, - M_CPU_TYPE (AMDFAM15H_BDVER1), P_PROC_XOP}, + PTA_BDVER1, + M_CPU_SUBTYPE (AMDFAM15H_BDVER1), P_PROC_XOP}, {"bdver2", PROCESSOR_BDVER2, CPU_BDVER2, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_FMA4 - | PTA_XOP | PTA_LWP | PTA_BMI | PTA_TBM | PTA_F16C - | PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE, - M_CPU_TYPE (AMDFAM15H_BDVER2), P_PROC_FMA}, + PTA_BDVER2, + M_CPU_SUBTYPE (AMDFAM15H_BDVER2), P_PROC_FMA}, {"bdver3", PROCESSOR_BDVER3, CPU_BDVER3, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_FMA4 - | PTA_XOP | PTA_LWP | PTA_BMI | PTA_TBM | PTA_F16C - | PTA_FMA | PTA_PRFCHW | PTA_FXSR | PTA_XSAVE - | PTA_XSAVEOPT | PTA_FSGSBASE, + PTA_BDVER3, M_CPU_SUBTYPE (AMDFAM15H_BDVER3), P_PROC_FMA}, {"bdver4", PROCESSOR_BDVER4, CPU_BDVER4, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSE4A | PTA_CX16 | PTA_ABM | PTA_SSSE3 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX | PTA_AVX2 - | PTA_FMA4 | PTA_XOP | PTA_LWP | PTA_BMI | PTA_BMI2 - | PTA_TBM | PTA_F16C | PTA_FMA | PTA_PRFCHW | PTA_FXSR - | PTA_XSAVE | PTA_XSAVEOPT | PTA_FSGSBASE | PTA_RDRND - | PTA_MOVBE | PTA_MWAITX, + PTA_BDVER4, M_CPU_SUBTYPE (AMDFAM15H_BDVER4), P_PROC_AVX2}, {"znver1", PROCESSOR_ZNVER1, CPU_ZNVER1, PTA_ZNVER1, @@ -2393,16 +2375,10 @@ const pta processor_alias_table[] = PTA_ZNVER5, M_CPU_SUBTYPE (AMDFAM1AH_ZNVER5), P_PROC_AVX512F}, {"btver1", PROCESSOR_BTVER1, CPU_GENERIC, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE, - M_CPU_SUBTYPE (AMDFAM15H_BDVER1), P_PROC_SSE4_A}, + PTA_BTVER1, + M_CPU_TYPE (AMD_BTVER1), P_PROC_SSE4_A}, {"btver2", PROCESSOR_BTVER2, CPU_BTVER2, - PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 - | PTA_SSSE3 | PTA_SSE4A | PTA_ABM | PTA_CX16 | PTA_SSE4_1 - | PTA_SSE4_2 | PTA_AES | PTA_PCLMUL | PTA_AVX - | PTA_BMI | PTA_F16C | PTA_MOVBE | PTA_PRFCHW - | PTA_FXSR | PTA_XSAVE | PTA_XSAVEOPT, + PTA_BTVER2, M_CPU_TYPE (AMD_BTVER2), P_PROC_BMI}, {"generic", PROCESSOR_GENERIC, CPU_GENERIC, @@ -2421,9 +2397,9 @@ const pta processor_alias_table[] = {"amdfam19h", PROCESSOR_GENERIC, CPU_GENERIC, 0, M_CPU_TYPE (AMDFAM19H), P_NONE}, {"shanghai", PROCESSOR_GENERIC, CPU_GENERIC, 0, - M_CPU_TYPE (AMDFAM10H_SHANGHAI), P_NONE}, + M_CPU_SUBTYPE (AMDFAM10H_SHANGHAI), P_NONE}, {"istanbul", PROCESSOR_GENERIC, CPU_GENERIC, 0, - M_CPU_TYPE (AMDFAM10H_ISTANBUL), P_NONE}, + M_CPU_SUBTYPE (AMDFAM10H_ISTANBUL), P_NONE}, }; /* NB: processor_alias_table stops at the "generic" entry. */ |