diff options
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/config.in | 3 | ||||
| -rwxr-xr-x | opcodes/configure | 287 | ||||
| -rw-r--r-- | opcodes/configure.ac | 2 | ||||
| -rw-r--r-- | opcodes/ppc-opc.c | 67 | ||||
| -rw-r--r-- | opcodes/riscv-opc.c | 16 |
5 files changed, 108 insertions, 267 deletions
diff --git a/opcodes/config.in b/opcodes/config.in index 409998f..64b3303 100644 --- a/opcodes/config.in +++ b/opcodes/config.in @@ -98,9 +98,6 @@ /* Define to the version of this package. */ #undef PACKAGE_VERSION -/* The size of `void *', as computed by sizeof. */ -#undef SIZEOF_VOID_P - /* Define to 1 if you have the ANSI C header files. */ #undef STDC_HEADERS diff --git a/opcodes/configure b/opcodes/configure index 554a070..4b6e965 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -646,8 +646,6 @@ cgendir CGEN_MAINT_FALSE CGEN_MAINT_TRUE HDEFINES -ENABLE_BFD_64_BIT_FALSE -ENABLE_BFD_64_BIT_TRUE EXEEXT_FOR_BUILD CC_FOR_BUILD CATOBJEXT @@ -819,7 +817,6 @@ with_libiconv_prefix with_libiconv_type with_libintl_prefix with_libintl_type -enable_64_bit_bfd enable_cgen_maint ' ac_precious_vars='build_alias @@ -1471,7 +1468,6 @@ Optional Features: --enable-install-libbfd controls installation of libbfd and related headers --disable-nls do not use Native Language Support --disable-rpath do not hardcode runtime library paths - --enable-64-bit-bfd 64-bit support (on hosts with narrower word sizes) --enable-cgen-maint=dir build cgen generated files Optional Packages: @@ -1926,189 +1922,6 @@ $as_echo "$ac_res" >&6; } } # ac_fn_c_check_func -# ac_fn_c_compute_int LINENO EXPR VAR INCLUDES -# -------------------------------------------- -# Tries to find the compile-time value of EXPR in a program that includes -# INCLUDES, setting VAR accordingly. Returns whether the value could be -# computed -ac_fn_c_compute_int () -{ - as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack - if test "$cross_compiling" = yes; then - # Depending upon the size, compute the lo and hi bounds. -cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -$4 -int -main () -{ -static int test_array [1 - 2 * !(($2) >= 0)]; -test_array [0] = 0; -return test_array [0]; - - ; - return 0; -} -_ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - ac_lo=0 ac_mid=0 - while :; do - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -$4 -int -main () -{ -static int test_array [1 - 2 * !(($2) <= $ac_mid)]; -test_array [0] = 0; -return test_array [0]; - - ; - return 0; -} -_ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - ac_hi=$ac_mid; break -else - as_fn_arith $ac_mid + 1 && ac_lo=$as_val - if test $ac_lo -le $ac_mid; then - ac_lo= ac_hi= - break - fi - as_fn_arith 2 '*' $ac_mid + 1 && ac_mid=$as_val -fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - done -else - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -$4 -int -main () -{ -static int test_array [1 - 2 * !(($2) < 0)]; -test_array [0] = 0; -return test_array [0]; - - ; - return 0; -} -_ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - ac_hi=-1 ac_mid=-1 - while :; do - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -$4 -int -main () -{ -static int test_array [1 - 2 * !(($2) >= $ac_mid)]; -test_array [0] = 0; -return test_array [0]; - - ; - return 0; -} -_ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - ac_lo=$ac_mid; break -else - as_fn_arith '(' $ac_mid ')' - 1 && ac_hi=$as_val - if test $ac_mid -le $ac_hi; then - ac_lo= ac_hi= - break - fi - as_fn_arith 2 '*' $ac_mid && ac_mid=$as_val -fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext - done -else - ac_lo= ac_hi= -fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -# Binary search between lo and hi bounds. -while test "x$ac_lo" != "x$ac_hi"; do - as_fn_arith '(' $ac_hi - $ac_lo ')' / 2 + $ac_lo && ac_mid=$as_val - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -$4 -int -main () -{ -static int test_array [1 - 2 * !(($2) <= $ac_mid)]; -test_array [0] = 0; -return test_array [0]; - - ; - return 0; -} -_ACEOF -if ac_fn_c_try_compile "$LINENO"; then : - ac_hi=$ac_mid -else - as_fn_arith '(' $ac_mid ')' + 1 && ac_lo=$as_val -fi -rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext -done -case $ac_lo in #(( -?*) eval "$3=\$ac_lo"; ac_retval=0 ;; -'') ac_retval=1 ;; -esac - else - cat confdefs.h - <<_ACEOF >conftest.$ac_ext -/* end confdefs.h. */ -$4 -static long int longval () { return $2; } -static unsigned long int ulongval () { return $2; } -#include <stdio.h> -#include <stdlib.h> -int -main () -{ - - FILE *f = fopen ("conftest.val", "w"); - if (! f) - return 1; - if (($2) < 0) - { - long int i = longval (); - if (i != ($2)) - return 1; - fprintf (f, "%ld", i); - } - else - { - unsigned long int i = ulongval (); - if (i != ($2)) - return 1; - fprintf (f, "%lu", i); - } - /* Do not output a trailing newline, as this causes \r\n confusion - on some platforms. */ - return ferror (f) || fclose (f) != 0; - - ; - return 0; -} -_ACEOF -if ac_fn_c_try_run "$LINENO"; then : - echo >>conftest.val; read $3 <conftest.val; ac_retval=0 -else - ac_retval=1 -fi -rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \ - conftest.$ac_objext conftest.beam conftest.$ac_ext -rm -f conftest.val - - fi - eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno - as_fn_set_status $ac_retval - -} # ac_fn_c_compute_int - # ac_fn_c_check_decl LINENO SYMBOL VAR INCLUDES # --------------------------------------------- # Tests whether SYMBOL is declared in INCLUDES, setting cache variable VAR @@ -11090,7 +10903,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11093 "configure" +#line 10906 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -11196,7 +11009,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 11199 "configure" +#line 11012 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -14025,70 +13838,40 @@ $as_echo "$bfd_cv_build_exeext" >&6; } test x"${bfd_cv_build_exeext}" != xno && EXEEXT_FOR_BUILD=${bfd_cv_build_exeext} fi -# Check whether --enable-64-bit-bfd was given. -if test "${enable_64_bit_bfd+set}" = set; then : - enableval=$enable_64_bit_bfd; case $enableval in #( - yes|no) : - ;; #( - *) : - as_fn_error $? "bad value ${enableval} for 64-bit-bfd option" "$LINENO" 5 ;; #( - *) : - ;; -esac -else - enable_64_bit_bfd=no -fi - - -if test "x$enable_64_bit_bfd" = "xno"; then : - # The cast to long int works around a bug in the HP C Compiler -# version HP92453-01 B.11.11.23709.GP, which incorrectly rejects -# declarations like `int a3[[(sizeof (unsigned char)) >= 0]];'. -# This bug is HP SR number 8606223364. -{ $as_echo "$as_me:${as_lineno-$LINENO}: checking size of void *" >&5 -$as_echo_n "checking size of void *... " >&6; } -if ${ac_cv_sizeof_void_p+:} false; then : - $as_echo_n "(cached) " >&6 -else - if ac_fn_c_compute_int "$LINENO" "(long int) (sizeof (void *))" "ac_cv_sizeof_void_p" "$ac_includes_default"; then : - -else - if test "$ac_cv_type_void_p" = yes; then - { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5 -$as_echo "$as_me: error: in \`$ac_pwd':" >&2;} -as_fn_error 77 "cannot compute sizeof (void *) -See \`config.log' for more details" "$LINENO" 5; } - else - ac_cv_sizeof_void_p=0 - fi -fi - -fi -{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sizeof_void_p" >&5 -$as_echo "$ac_cv_sizeof_void_p" >&6; } - - - -cat >>confdefs.h <<_ACEOF -#define SIZEOF_VOID_P $ac_cv_sizeof_void_p +# See whether 64-bit bfd lib has been enabled. +OLD_CPPFLAGS=$CPPFLAGS +# Put the old CPPFLAGS last, in case the user's CPPFLAGS point somewhere +# with bfd, with -I/foo/include. We always want our bfd. +CPPFLAGS="-I${srcdir}/../include -I../bfd -I${srcdir}/../bfd $CPPFLAGS" +# Note we cannot cache the result of this check because BFD64 may change +# when a secondary target has been added or removed and we have no access +# to this information here. +{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether BFD is 64-bit" >&5 +$as_echo_n "checking whether BFD is 64-bit... " >&6; } +cat confdefs.h - <<_ACEOF >conftest.$ac_ext +/* end confdefs.h. */ +#include "bfd.h" +int +main () +{ +#ifdef BFD64 +HAVE_BFD64 +#endif + ; + return 0; +} _ACEOF - - - if test "x$ac_cv_sizeof_void_p" = "x8"; then : - enable_64_bit_bfd=yes -fi - -fi - - if test "x$enable_64_bit_bfd" = "xyes"; then - ENABLE_BFD_64_BIT_TRUE= - ENABLE_BFD_64_BIT_FALSE='#' +if (eval "$ac_cpp conftest.$ac_ext") 2>&5 | + $EGREP "HAVE_BFD64" >/dev/null 2>&1; then : + have_64_bit_bfd=yes else - ENABLE_BFD_64_BIT_TRUE='#' - ENABLE_BFD_64_BIT_FALSE= + have_64_bit_bfd=no fi +rm -f conftest* - +{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $have_64_bit_bfd" >&5 +$as_echo "$have_64_bit_bfd" >&6; } +CPPFLAGS=$OLD_CPPFLAGS @@ -14567,7 +14350,7 @@ if test x${all_targets} = xfalse ; then else # all_targets is true archdefs=-DARCH_all - if test "$enable_64_bit_bfd" = "yes" ; then + if test "$have_64_bit_bfd" = "yes" ; then BFD_MACHINES='$(ALL32_MACHINES) $(ALL64_MACHINES)' else BFD_MACHINES='$(ALL32_MACHINES)' @@ -14720,10 +14503,6 @@ if test -z "${INSTALL_LIBBFD_TRUE}" && test -z "${INSTALL_LIBBFD_FALSE}"; then as_fn_error $? "conditional \"INSTALL_LIBBFD\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 fi -if test -z "${ENABLE_BFD_64_BIT_TRUE}" && test -z "${ENABLE_BFD_64_BIT_FALSE}"; then - as_fn_error $? "conditional \"ENABLE_BFD_64_BIT\" was never defined. -Usually this means the macro was only invoked conditionally." "$LINENO" 5 -fi if test -z "${CGEN_MAINT_TRUE}" && test -z "${CGEN_MAINT_FALSE}"; then as_fn_error $? "conditional \"CGEN_MAINT\" was never defined. Usually this means the macro was only invoked conditionally." "$LINENO" 5 diff --git a/opcodes/configure.ac b/opcodes/configure.ac index 4f8c734..b30f9f8 100644 --- a/opcodes/configure.ac +++ b/opcodes/configure.ac @@ -383,7 +383,7 @@ if test x${all_targets} = xfalse ; then else # all_targets is true archdefs=-DARCH_all - if test "$enable_64_bit_bfd" = "yes" ; then + if test "$have_64_bit_bfd" = "yes" ; then BFD_MACHINES='$(ALL32_MACHINES) $(ALL64_MACHINES)' else BFD_MACHINES='$(ALL32_MACHINES)' diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index ba93e56..712cd31 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -691,6 +691,52 @@ extract_imm32 (uint64_t insn, return (insn & 0xffff) | ((insn >> 16) & 0xffff0000); } +/* The 32bit SI field in a 64-bit D form prefix instruction when the field is split + into separate SI0 and SI1 fields. */ + +static uint64_t +insert_si32 (uint64_t insn, + int64_t value, + ppc_cpu_t dialect ATTRIBUTE_UNUSED, + const char **errmsg ATTRIBUTE_UNUSED) +{ + return insn | ((value & 0xffff0000ULL) << 16) | (value & 0xffff); +} + +static int64_t +extract_si32 (uint64_t insn, + ppc_cpu_t dialect ATTRIBUTE_UNUSED, + int *invalid ATTRIBUTE_UNUSED) +{ + int64_t mask = 1ULL << 31; + int64_t value = ((insn >> 16) & 0xffff0000ULL) | (insn & 0xffff); + value = (value ^ mask) - mask; + return value; +} + +/* The NSI32 field in an 8-byte D form prefix instruction. This is the same + as the SI32 field, only negated. The extraction function always marks it + as invalid, since we never want to recognize an instruction which uses + a field of this type. */ +static uint64_t +insert_nsi32 (uint64_t insn, + int64_t value, + ppc_cpu_t dialect, + const char **errmsg) +{ + return insert_si32 (insn, -value, dialect, errmsg); +} + +static int64_t +extract_nsi32 (uint64_t insn, + ppc_cpu_t dialect, + int *invalid) +{ + int64_t value = extract_si32 (insn, dialect, invalid); + *invalid = 1; + return -value; +} + /* The R field in an 8-byte prefix instruction when there are restrictions between R's value and the RA value (ie, they cannot both be non zero). */ @@ -3073,8 +3119,18 @@ const struct powerpc_operand powerpc_operands[] = { UINT64_C(0x3ffffffff), PPC_OPSHIFT_INV, insert_nsi34, extract_nsi34, PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED }, + /* The 32bit SI field in an 8-byte D form prefix instruction. */ +#define SI32 NSI34 + 1 + { UINT64_C(0xffffffff), PPC_OPSHIFT_INV, insert_si32, extract_si32, PPC_OPERAND_SIGNED }, + + /* The NSI field in an 8-byte D form prefix instruction with 32bit SI field. This is + the same as the SI32 field, only negated. */ +#define NSI32 SI32 + 1 + { UINT64_C(0xffffffff), PPC_OPSHIFT_INV, insert_nsi32, extract_nsi32, + PPC_OPERAND_NEGATIVE | PPC_OPERAND_SIGNED }, + /* The IMM32 field in a vector splat immediate prefix instruction. */ -#define IMM32 NSI34 + 1 +#define IMM32 NSI32 + 1 { 0xffffffff, PPC_OPSHIFT_INV, insert_imm32, extract_imm32, 0}, /* The UIM field in a vector permute extended prefix instruction. */ @@ -4031,9 +4087,15 @@ const unsigned int num_powerpc_operands = ARRAY_SIZE (powerpc_operands); /* An 8-byte D form prefix instruction. */ #define P_D_MASK (((-1ULL << 50) & ~PCREL_MASK) | OP_MASK) +/* An 8-byte D form prefix instruction with 32bit SI field. */ +#define P_D_SI32_MASK (((-1ULL << 48) & ~PCREL_MASK) | OP_MASK) + /* The same as P_D_MASK, but with the RA and PCREL fields specified. */ #define P_DRAPCREL_MASK (P_D_MASK | PCREL_MASK | RA_MASK) +/* The same as P_D_SI32_MASK, but with the RA and PCREL fields specified. */ +#define P_DRAPCREL_SI32_MASK (P_D_SI32_MASK | PCREL_MASK | RA_MASK) + /* Mask for prefix X form instructions. */ #define P_X_MASK (PREFIX_MASK | X_MASK) #define P_XX1_MASK (PREFIX_MASK | XX1_MASK) @@ -9863,6 +9925,9 @@ const struct powerpc_opcode prefix_opcodes[] = { {"pla", PMLS|OP(14), P_D_MASK, POWER10, EXT, {RT, D34, PRA0, PCREL1}}, {"paddi", PMLS|OP(14), P_D_MASK, POWER10, 0, {RT, RA0, SI34, PCREL}}, {"psubi", PMLS|OP(14), P_D_MASK, POWER10, EXT, {RT, RA0, NSI34, PCREL}}, +{"plis", PMLS|OP(15), P_DRAPCREL_SI32_MASK, FUTURE, EXT, {RT, SI32}}, +{"paddis", PMLS|OP(15), P_D_SI32_MASK, FUTURE, 0, {RT, RA0, SI32, PCREL}}, +{"psubis", PMLS|OP(15), P_D_SI32_MASK, FUTURE, EXT, {RT, RA0, NSI32, PCREL}}, {"xxsplti32dx", P8RR|VSOP(32,0), P_VSI_MASK, POWER10, 0, {XTS, IX, IMM32}}, {"xxspltidp", P8RR|VSOP(32,2), P_VS_MASK, POWER10, 0, {XTS, IMM32}}, {"xxspltiw", P8RR|VSOP(32,3), P_VS_MASK, POWER10, 0, {XTS, IMM32}}, diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index e07f72b..6f49fdb 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -907,8 +907,8 @@ const struct riscv_opcode riscv_opcodes[] = {"feq.h", 0, INSN_CLASS_ZFH_INX, "d,S,T", MATCH_FEQ_H, MASK_FEQ_H, match_opcode, 0 }, {"flt.h", 0, INSN_CLASS_ZFH_INX, "d,S,T", MATCH_FLT_H, MASK_FLT_H, match_opcode, 0 }, {"fle.h", 0, INSN_CLASS_ZFH_INX, "d,S,T", MATCH_FLE_H, MASK_FLE_H, match_opcode, 0 }, -{"fgt.h", 0, INSN_CLASS_ZFH_INX, "d,T,S", MATCH_FLT_H, MASK_FLT_H, match_opcode, 0 }, -{"fge.h", 0, INSN_CLASS_ZFH_INX, "d,T,S", MATCH_FLE_H, MASK_FLE_H, match_opcode, 0 }, +{"fgt.h", 0, INSN_CLASS_ZFH_INX, "d,T,S", MATCH_FLT_H, MASK_FLT_H, match_opcode, INSN_ALIAS }, +{"fge.h", 0, INSN_CLASS_ZFH_INX, "d,T,S", MATCH_FLE_H, MASK_FLE_H, match_opcode, INSN_ALIAS }, {"fcvt.l.h", 64, INSN_CLASS_ZFH_INX, "d,S", MATCH_FCVT_L_H|MASK_RM, MASK_FCVT_L_H|MASK_RM, match_opcode, 0 }, {"fcvt.l.h", 64, INSN_CLASS_ZFH_INX, "d,S,m", MATCH_FCVT_L_H, MASK_FCVT_L_H, match_opcode, 0 }, {"fcvt.lu.h", 64, INSN_CLASS_ZFH_INX, "d,S", MATCH_FCVT_LU_H|MASK_RM, MASK_FCVT_LU_H|MASK_RM, match_opcode, 0 }, @@ -990,8 +990,8 @@ const struct riscv_opcode riscv_opcodes[] = {"feq.s", 0, INSN_CLASS_F_INX, "d,S,T", MATCH_FEQ_S, MASK_FEQ_S, match_opcode, 0 }, {"flt.s", 0, INSN_CLASS_F_INX, "d,S,T", MATCH_FLT_S, MASK_FLT_S, match_opcode, 0 }, {"fle.s", 0, INSN_CLASS_F_INX, "d,S,T", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 }, -{"fgt.s", 0, INSN_CLASS_F_INX, "d,T,S", MATCH_FLT_S, MASK_FLT_S, match_opcode, 0 }, -{"fge.s", 0, INSN_CLASS_F_INX, "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, 0 }, +{"fgt.s", 0, INSN_CLASS_F_INX, "d,T,S", MATCH_FLT_S, MASK_FLT_S, match_opcode, INSN_ALIAS }, +{"fge.s", 0, INSN_CLASS_F_INX, "d,T,S", MATCH_FLE_S, MASK_FLE_S, match_opcode, INSN_ALIAS }, {"fcvt.l.s", 64, INSN_CLASS_F_INX, "d,S", MATCH_FCVT_L_S|MASK_RM, MASK_FCVT_L_S|MASK_RM, match_opcode, 0 }, {"fcvt.l.s", 64, INSN_CLASS_F_INX, "d,S,m", MATCH_FCVT_L_S, MASK_FCVT_L_S, match_opcode, 0 }, {"fcvt.lu.s", 64, INSN_CLASS_F_INX, "d,S", MATCH_FCVT_LU_S|MASK_RM, MASK_FCVT_LU_S|MASK_RM, match_opcode, 0 }, @@ -1049,8 +1049,8 @@ const struct riscv_opcode riscv_opcodes[] = {"feq.d", 0, INSN_CLASS_D_INX, "d,S,T", MATCH_FEQ_D, MASK_FEQ_D, match_opcode, 0 }, {"flt.d", 0, INSN_CLASS_D_INX, "d,S,T", MATCH_FLT_D, MASK_FLT_D, match_opcode, 0 }, {"fle.d", 0, INSN_CLASS_D_INX, "d,S,T", MATCH_FLE_D, MASK_FLE_D, match_opcode, 0 }, -{"fgt.d", 0, INSN_CLASS_D_INX, "d,T,S", MATCH_FLT_D, MASK_FLT_D, match_opcode, 0 }, -{"fge.d", 0, INSN_CLASS_D_INX, "d,T,S", MATCH_FLE_D, MASK_FLE_D, match_opcode, 0 }, +{"fgt.d", 0, INSN_CLASS_D_INX, "d,T,S", MATCH_FLT_D, MASK_FLT_D, match_opcode, INSN_ALIAS }, +{"fge.d", 0, INSN_CLASS_D_INX, "d,T,S", MATCH_FLE_D, MASK_FLE_D, match_opcode, INSN_ALIAS }, {"fmv.x.d", 64, INSN_CLASS_D, "d,S", MATCH_FMV_X_D, MASK_FMV_X_D, match_opcode, 0 }, {"fmv.d.x", 64, INSN_CLASS_D, "D,s", MATCH_FMV_D_X, MASK_FMV_D_X, match_opcode, 0 }, {"fcvt.l.d", 64, INSN_CLASS_D_INX, "d,S", MATCH_FCVT_L_D|MASK_RM, MASK_FCVT_L_D|MASK_RM, match_opcode, 0 }, @@ -1109,8 +1109,8 @@ const struct riscv_opcode riscv_opcodes[] = {"feq.q", 0, INSN_CLASS_Q_INX, "d,S,T", MATCH_FEQ_Q, MASK_FEQ_Q, match_opcode, 0 }, {"flt.q", 0, INSN_CLASS_Q_INX, "d,S,T", MATCH_FLT_Q, MASK_FLT_Q, match_opcode, 0 }, {"fle.q", 0, INSN_CLASS_Q_INX, "d,S,T", MATCH_FLE_Q, MASK_FLE_Q, match_opcode, 0 }, -{"fgt.q", 0, INSN_CLASS_Q_INX, "d,T,S", MATCH_FLT_Q, MASK_FLT_Q, match_opcode, 0 }, -{"fge.q", 0, INSN_CLASS_Q_INX, "d,T,S", MATCH_FLE_Q, MASK_FLE_Q, match_opcode, 0 }, +{"fgt.q", 0, INSN_CLASS_Q_INX, "d,T,S", MATCH_FLT_Q, MASK_FLT_Q, match_opcode, INSN_ALIAS }, +{"fge.q", 0, INSN_CLASS_Q_INX, "d,T,S", MATCH_FLE_Q, MASK_FLE_Q, match_opcode, INSN_ALIAS }, {"fcvt.l.q", 64, INSN_CLASS_Q_INX, "d,S", MATCH_FCVT_L_Q|MASK_RM, MASK_FCVT_L_Q|MASK_RM, match_opcode, 0 }, {"fcvt.l.q", 64, INSN_CLASS_Q_INX, "d,S,m", MATCH_FCVT_L_Q, MASK_FCVT_L_Q, match_opcode, 0 }, {"fcvt.lu.q", 64, INSN_CLASS_Q_INX, "d,S", MATCH_FCVT_LU_Q|MASK_RM, MASK_FCVT_LU_Q|MASK_RM, match_opcode, 0 }, |