diff options
Diffstat (limited to 'ld/testsuite/ld-powerpc/tlsopt4_32.d')
| -rw-r--r-- | ld/testsuite/ld-powerpc/tlsopt4_32.d | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/ld/testsuite/ld-powerpc/tlsopt4_32.d b/ld/testsuite/ld-powerpc/tlsopt4_32.d index 4b667f6..f62a0ea 100644 --- a/ld/testsuite/ld-powerpc/tlsopt4_32.d +++ b/ld/testsuite/ld-powerpc/tlsopt4_32.d @@ -1,44 +1,44 @@ #source: tlsopt4_32.s #source: tlslib32.s #as: -a32 -#ld: -melf32ppc +#ld: #objdump: -dr #target: powerpc*-*-* -.*: +file format elf32-powerpc +.* Disassembly of section \.text: 0+1800094 <__tls_get_addr>: - 1800094: 4e 80 00 20 blr +.*: (4e 80 00 20|20 00 80 4e) blr Disassembly of section \.opt1: 0+1800098 <\.opt1>: - 1800098: 3c 62 00 00 addis r3,r2,0 - 180009c: 2c 04 00 00 cmpwi r4,0 - 18000a0: 41 82 00 0c beq- .* - 18000a4: 38 63 90 10 addi r3,r3,-28656 - 18000a8: 48 00 00 08 b .* - 18000ac: 38 63 90 10 addi r3,r3,-28656 +.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 +.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0 +.*: (41 82 00 0c|0c 00 82 41) beq- .* +.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 +.*: (48 00 00 08|08 00 00 48) b .* +.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 Disassembly of section \.opt2: 0+18000b0 <\.opt2>: - 18000b0: 3c 62 00 00 addis r3,r2,0 - 18000b4: 2c 04 00 00 cmpwi r4,0 - 18000b8: 41 82 00 08 beq- .* - 18000bc: 3c 62 00 00 addis r3,r2,0 - 18000c0: 38 63 90 10 addi r3,r3,-28656 +.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 +.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0 +.*: (41 82 00 08|08 00 82 41) beq- .* +.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 +.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 Disassembly of section \.opt3: 0+18000c4 <\.opt3>: - 18000c4: 3c 62 00 00 addis r3,r2,0 - 18000c8: 48 00 00 0c b .* - 18000cc: 3c 62 00 00 addis r3,r2,0 - 18000d0: 48 00 00 0c b .* - 18000d4: 38 63 90 10 addi r3,r3,-28656 - 18000d8: 48 00 00 08 b .* - 18000dc: 38 63 90 08 addi r3,r3,-28664 +.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 +.*: (48 00 00 0c|0c 00 00 48) b .* +.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 +.*: (48 00 00 0c|0c 00 00 48) b .* +.*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 +.*: (48 00 00 08|08 00 00 48) b .* +.*: (38 63 90 08|08 90 63 38) addi r3,r3,-28664 #pass |