diff options
author | Nick Clifton <nickc@redhat.com> | 2011-06-03 10:04:03 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2011-06-03 10:04:03 +0000 |
commit | f8b960bc801b0a6fb202fb0b0e77b215d66f6c17 (patch) | |
tree | b38a6b71612cce17d3c12a374d81d6b0c7653ec4 /opcodes | |
parent | 36f3e98103666c2107ad7e5cb40aa6961ee28c63 (diff) | |
download | binutils-f8b960bc801b0a6fb202fb0b0e77b215d66f6c17.zip binutils-f8b960bc801b0a6fb202fb0b0e77b215d66f6c17.tar.gz binutils-f8b960bc801b0a6fb202fb0b0e77b215d66f6c17.tar.bz2 |
PR binutils/12752
* arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
computing address offsets.
(print_arm_address): Likewise.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 16 | ||||
-rw-r--r-- | opcodes/arm-dis.c | 16 |
2 files changed, 24 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index e4a41e7..c2b4530 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,13 @@ +2011-06-03 Nick Clifton <nickc@redhat.com> + + PR binutils/12752 + * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for + computing address offsets. + (print_arm_address): Likewise. + (print_insn_arm): Likewise. + (print_insn_thumb16): Likewise. + (print_insn_thumb32): Likewise. + 2011-06-02 Jie Zhang <jie@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> Maciej Rozycki <macro@codesourcery.com> @@ -9,6 +19,12 @@ 2011-06-02 Nick Clifton <nickc@redhat.com> + PR gas/12752 + * arm-dis.c (print_insn_thumb32): Do not sign extend addresses + passed to print_address_func. + +2011-06-02 Nick Clifton <nickc@redhat.com> + * arm-dis.c: Fix spelling mistakes. * op/opcodes.pot: Regenerate. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index a4919ca..fafa7f6 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1873,7 +1873,7 @@ print_insn_coprocessor (bfd_vma pc, case 'A': { int rn = (given >> 16) & 0xf; - int offset = given & 0xff; + bfd_vma offset = given & 0xff; func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]); @@ -2335,7 +2335,7 @@ print_arm_address (bfd_vma pc, struct disassemble_info *info, long given) { void *stream = info->stream; fprintf_ftype func = info->fprintf_func; - int offset = 0; + bfd_vma offset = 0; if (((given & 0x000f0000) == 0x000f0000) && ((given & 0x02000000) == 0)) @@ -2995,7 +2995,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) if ((given & 0x004f0000) == 0x004f0000) { /* PC relative with immediate offset. */ - int offset = ((given & 0xf00) >> 4) | (given & 0xf); + bfd_vma offset = ((given & 0xf00) >> 4) | (given & 0xf); if (PRE_BIT_SET) { @@ -3102,7 +3102,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) case 'b': { - int disp = (((given & 0xffffff) ^ 0x800000) - 0x800000); + bfd_vma disp = (((given & 0xffffff) ^ 0x800000) - 0x800000); info->print_address_func (disp * 4 + pc + 8, info); } break; @@ -3619,7 +3619,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) { case '-': { - long reg; + bfd_vma reg; c++; while (*c >= '0' && *c <= '9') @@ -3908,7 +3908,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) unsigned int i12 = (given & 0x00000fff); unsigned int i8 = (given & 0x000000ff); bfd_boolean writeback = FALSE, postind = FALSE; - int offset = 0; + bfd_vma offset = 0; func (stream, "[%s", arm_regnames[Rn]); if (U) /* 12-bit positive immediate offset. */ @@ -4085,7 +4085,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) unsigned int S = (given & 0x04000000u) >> 26; unsigned int J1 = (given & 0x00002000u) >> 13; unsigned int J2 = (given & 0x00000800u) >> 11; - int offset = 0; + bfd_vma offset = 0; offset |= !S << 20; offset |= J2 << 19; @@ -4103,7 +4103,7 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) unsigned int S = (given & 0x04000000u) >> 26; unsigned int I1 = (given & 0x00002000u) >> 13; unsigned int I2 = (given & 0x00000800u) >> 11; - int offset = 0; + bfd_vma offset = 0; offset |= !S << 24; offset |= !(I1 ^ S) << 23; |