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| author | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:02:54 +0000 |
|---|---|---|
| committer | Przemyslaw Wirkus <przemyslaw.wirkus@arm.com> | 2021-11-17 19:16:48 +0000 |
| commit | 57f02370a1e55bf09d3ede5ba6b2fcc78b40200a (patch) | |
| tree | ccfec990c7a93945882e6a0b6ebb8e487e2922ba /opcodes | |
| parent | ef6379e16dd164487e10a06e19bcb006d5c3788b (diff) | |
| download | binutils-57f02370a1e55bf09d3ede5ba6b2fcc78b40200a.zip binutils-57f02370a1e55bf09d3ede5ba6b2fcc78b40200a.tar.gz binutils-57f02370a1e55bf09d3ede5ba6b2fcc78b40200a.tar.bz2 | |
aarch64: [SME] Add +sme option to -march
This series of patches (tagged [SME]) add support for the Scalable
Matrix Extension. Patch introduces new command line options: +sme, +sme-f64 and
+sme-i64 to -march command line options.
gas/ChangeLog:
* NEWS: Updated docs.
* config/tc-aarch64.c: New SME command line options.
* doc/c-aarch64.texi: Update docs.
include/ChangeLog:
* opcode/aarch64.h (AARCH64_FEATURE_SME): New flag.
(AARCH64_FEATURE_SME_F64): New flag.
(AARCH64_FEATURE_SME_I64): New flag.
opcodes/ChangeLog:
* aarch64-tbl.h (SME): New feature object.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/aarch64-tbl.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h index 17ea851..d63b081 100644 --- a/opcodes/aarch64-tbl.h +++ b/opcodes/aarch64-tbl.h @@ -2401,6 +2401,14 @@ static const aarch64_feature_set aarch64_feature_sve2sm4 = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_SM4, 0); static const aarch64_feature_set aarch64_feature_sve2bitperm = AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_BITPERM, 0); +static const aarch64_feature_set aarch64_feature_sme = + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME, 0); +static const aarch64_feature_set aarch64_feature_sme_f64 = + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME + | AARCH64_FEATURE_SME_F64, 0); +static const aarch64_feature_set aarch64_feature_sme_i64 = + AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SME + | AARCH64_FEATURE_SME_I64, 0); static const aarch64_feature_set aarch64_feature_v8_6 = AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0); static const aarch64_feature_set aarch64_feature_v8_7 = @@ -2458,6 +2466,9 @@ static const aarch64_feature_set aarch64_feature_flagm = #define SVE2_SHA3 &aarch64_feature_sve2sha3 #define SVE2_SM4 &aarch64_feature_sve2sm4 #define SVE2_BITPERM &aarch64_feature_sve2bitperm +#define SME &aarch64_feature_sme +#define SME_F64 &aarch64_feature_sme_f64 +#define SME_I64 &aarch64_feature_sme_i64 #define ARMV8_6 &aarch64_feature_v8_6 #define ARMV8_6_SVE &aarch64_feature_v8_6 #define BFLOAT16_SVE &aarch64_feature_bfloat16_sve |