diff options
| author | Jan Beulich <jbeulich@suse.com> | 2024-02-09 08:38:04 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2024-02-09 08:38:04 +0100 |
| commit | 066673f6d5ef258b9534f6baaa3d52fa35905b00 (patch) | |
| tree | 2f82f794e36c913563ef27d51d1be8950455ff52 /opcodes | |
| parent | 272b9416f3ce062de0c28f8dfa2a4112993dd77c (diff) | |
| download | binutils-066673f6d5ef258b9534f6baaa3d52fa35905b00.zip binutils-066673f6d5ef258b9534f6baaa3d52fa35905b00.tar.gz binutils-066673f6d5ef258b9534f6baaa3d52fa35905b00.tar.bz2 | |
x86: change type of Dwarf2 register numbers in register table
Already the %bnd<N> registers used numbers beyond 127, and eGPR ones are
all out of reach for "signed char", at least when CHAR_BITS=8. Switch to
"unsigned char", covering appropriately in places where the value
returned for "none" actually matters (in tc_x86_parse_to_dw2regnum()
this is actually achieved by altering how X_op is set).
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/i386-opc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 004d9ee..0a2c44a 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -1051,7 +1051,7 @@ typedef struct #define RegIZ (RegIP - 1) /* FLAT is a fake segment register (Intel mode). */ #define RegFlat ((unsigned char) ~0) - signed char dw2_regnum[2]; -#define Dw2Inval (-1) + unsigned char dw2_regnum[2]; +#define Dw2Inval 0xff } reg_entry; |