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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-26 11:38:04 +0200 |
|---|---|---|
| committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-26 11:38:04 +0200 |
| commit | 04896832b2e79c042ea1f510b0458ac342512152 (patch) | |
| tree | f1657eebb830604f82dcb4f731afd8143d9cc69d /opcodes | |
| parent | 477c9f2ba26ccd77016f2c97941fc8b35e332e35 (diff) | |
| download | binutils-04896832b2e79c042ea1f510b0458ac342512152.zip binutils-04896832b2e79c042ea1f510b0458ac342512152.tar.gz binutils-04896832b2e79c042ea1f510b0458ac342512152.tar.bz2 | |
bpf: fix register NEG[32] instructions
This patch fixes the BPF_INSN_NEGR and BPF_INSN_NEG32R BPF
instructions to not use their source registers.
Tested in bpf-unknown-none.
opcodes/ChangeLog:
2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-opc.c (bpf_opcodes): Fix BPF_INSN_NEGR to not use a src
register.
gas/ChangeLog:
2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/alu.s: The register neg instruction gets only
one argument.
* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
* testsuite/gas/bpf/alu-be.d: Likewise.
* testsuite/gas/bpf/alu.d: Likewise.
* testsuite/gas/bpf/alu32-be.d: Likewise.
* testsuite/gas/bpf/alu32.d: Likewise.
* testsuite/gas/bpf/alu32.s: Likewise.
* doc/c-bpf.texi (BPF Instructions): Update accordingly.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/bpf-opc.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 973b17e..f611ec5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com> + + * bpf-opc.c (bpf_opcodes): Fix BPF_INSN_NEGR to not use a src + register. + 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf-opc.c (bpf_opcodes): Add entries for the BSWAP* diff --git a/opcodes/bpf-opc.c b/opcodes/bpf-opc.c index 26db795..3f42680 100644 --- a/opcodes/bpf-opc.c +++ b/opcodes/bpf-opc.c @@ -73,7 +73,7 @@ const struct bpf_opcode bpf_opcodes[] = BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_XOR|BPF_SRC_X}, {BPF_INSN_XORI, "xor%W%dr , %i32", "%dr ^= %i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_XOR|BPF_SRC_K}, - {BPF_INSN_NEGR, "neg%W%dr, %sr", "%dr = - %sr", + {BPF_INSN_NEGR, "neg%W%dr", "%dr = - %dr", BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_X}, {BPF_INSN_NEGI, "neg%W%dr , %i32", "%dr = -%W%i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_K}, @@ -141,7 +141,7 @@ const struct bpf_opcode bpf_opcodes[] = BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_XOR|BPF_SRC_X}, {BPF_INSN_XOR32I, "xor32%W%dr , %i32", "%dw ^= %i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_XOR|BPF_SRC_K}, - {BPF_INSN_NEG32R, "neg32%W%dr , %sr", "%dw = - %sw", + {BPF_INSN_NEG32R, "neg32%W%dr", "%dw = - %dw", BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_X}, {BPF_INSN_NEG32I, "neg32%W%dr , %i32", "%dw = -%W%i32", BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_K}, |