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authorSrinath Parvathaneni <srinath.parvathaneni@arm.com>2024-06-25 11:27:23 +0100
committerSrinath Parvathaneni <srinath.parvathaneni@arm.com>2024-06-25 13:38:48 +0100
commitf5f38efc0a20cb50105da4fd2f656cda4561ccc2 (patch)
treecb938e82dc5a9326ba5d7c15b593eba902e7f2e8 /opcodes/aarch64-dis.c
parent8e018c070ce41fe83f09b4fde8c2b2d9ad473e25 (diff)
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aarch64: Fix sve2p1 dupq instruction operands.
This patch fixes the syntax of sve2p1 "dupq" instruction by modifying the way 2nd operand does the encoding and decoding using the [<imm>] value. dupq makes use of already existing aarch64_ins_sve_index and aarch64_ext_sve_index inserter and extractor functions. The definitions of aarch64_ins_sve_index_imm (inserter) and aarch64_ext_sve_index_imm (extractor) is removed in this patch. This issues was reported here: https://sourceware.org/pipermail/binutils/2024-February/132408.html
Diffstat (limited to 'opcodes/aarch64-dis.c')
-rw-r--r--opcodes/aarch64-dis.c36
1 files changed, 3 insertions, 33 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c
index 6098204..d3f38c3 100644
--- a/opcodes/aarch64-dis.c
+++ b/opcodes/aarch64-dis.c
@@ -2237,7 +2237,7 @@ aarch64_ext_sve_index (const aarch64_operand *self,
int val;
info->reglane.regno = extract_field (self->fields[0], code, 0);
- val = extract_fields (code, 0, 2, FLD_SVE_tszh, FLD_imm5);
+ val = extract_all_fields_after (self, 1, code);
if ((val & 31) == 0)
return 0;
while ((val & 1) == 0)
@@ -2246,26 +2246,6 @@ aarch64_ext_sve_index (const aarch64_operand *self,
return true;
}
-/* Decode Zn.<T>[<imm>], where <imm> is an immediate with range of 0 to one less
- than the number of elements in 128 bit, which can encode il:tsz. */
-bool
-aarch64_ext_sve_index_imm (const aarch64_operand *self,
- aarch64_opnd_info *info, aarch64_insn code,
- const aarch64_inst *inst ATTRIBUTE_UNUSED,
- aarch64_operand_error *errors ATTRIBUTE_UNUSED)
-{
- int val;
-
- info->reglane.regno = extract_field (self->fields[0], code, 0);
- val = extract_fields (code, 0, 2, self->fields[2], self->fields[1]);
- if ((val & 15) == 0)
- return 0;
- while ((val & 1) == 0)
- val /= 2;
- info->reglane.index = val / 2;
- return true;
-}
-
/* Decode a logical immediate for the MOV alias of SVE DUPM. */
bool
aarch64_ext_sve_limm_mov (const aarch64_operand *self,
@@ -3456,19 +3436,9 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
break;
case sve_index:
- i = extract_fields (inst->value, 0, 2, FLD_SVE_tszh, FLD_imm5);
- if ((i & 31) == 0)
- return false;
- while ((i & 1) == 0)
- {
- i >>= 1;
- variant += 1;
- }
- break;
+ i = extract_field (FLD_imm5, inst->value, 0);
- case sve_index1:
- i = extract_fields (inst->value, 0, 2, FLD_SVE_tsz, FLD_SVE_i2h);
- if ((i & 15) == 0)
+ if ((i & 31) == 0)
return false;
while ((i & 1) == 0)
{