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author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:13 +0100 |
commit | ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a (patch) | |
tree | 9dec9ddf10c70e8d8c16f5f0820eb23eefe4a733 /opcodes/aarch64-dis.c | |
parent | 80752eb0989b85e88af7f1f4627dbed8a42dfe6d (diff) | |
download | binutils-ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a.zip binutils-ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a.tar.gz binutils-ed429b33c1ee8d6d8f8e640e58f04ec800bc7b2a.tar.bz2 |
aarch64: Add the SME2 MLAL and MLSL instructions
The {BF,F,S,U}MLAL and {BF,F,S,U}MLSL instructions share the same
encoding. They are the first instance of a ZA (as opposed to ZA tile)
operand having a range of offsets. As with ZA tiles, the expected
range size is encoded in the operand-specific data field.
Diffstat (limited to 'opcodes/aarch64-dis.c')
-rw-r--r-- | opcodes/aarch64-dis.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index bfeab06..7271231 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -1905,7 +1905,7 @@ aarch64_ext_sme_za_list (const aarch64_operand *self, bool aarch64_ext_sme_za_array (const aarch64_operand *self, aarch64_opnd_info *info, aarch64_insn code, - const aarch64_inst *inst ATTRIBUTE_UNUSED, + const aarch64_inst *inst, aarch64_operand_error *errors ATTRIBUTE_UNUSED) { int regno = extract_field (self->fields[0], code, 0); @@ -1914,8 +1914,12 @@ aarch64_ext_sme_za_array (const aarch64_operand *self, else regno += 8; int imm = extract_field (self->fields[1], code, 0); + int num_offsets = get_operand_specific_data (self); + if (num_offsets == 0) + num_offsets = 1; info->indexed_za.index.regno = regno; - info->indexed_za.index.imm = imm; + info->indexed_za.index.imm = imm * num_offsets; + info->indexed_za.index.countm1 = num_offsets - 1; info->indexed_za.group_size = get_opcode_dependent_value (inst->opcode); return true; } |