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authorH.J. Lu <hjl.tools@gmail.com>2018-09-14 10:49:43 -0700
committerH.J. Lu <hjl.tools@gmail.com>2018-09-14 10:49:53 -0700
commitd20dee9efad3c23c9098f03ac785037572258483 (patch)
tree170cde5009a0f2cd1b07497e36b3140251d62b46 /opcodes/ChangeLog
parent5074ad8a66ab2e955cf3ae4dba5773d5aa67b29b (diff)
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x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit mode
Update x86 disassembler to ignore the EVEX.W bit in EVEX vcvt[u]si2s[sd] instructions in 32-bit mode. gas/ PR binutils/23655 * testsuite/gas/i386/evex.d: New file. * testsuite/gas/i386/evex.s: Likewise. * testsuite/gas/i386/i386.exp: Run evex. opcodes/ PR binutils/23655 * i386-dis-evex.h (evex_table): Replace Eq with Edqa for vcvtsi2ss%LQ, vcvtsi2sd%LQ, vcvtusi2ss%LQ and vcvtusi2sd%LQ. * i386-dis.c (Edqa): New. (dqa_mode): Likewise. (intel_operand_size): Handle dqa_mode as m_mode. (OP_E_register): Handle dqa_mode as dq_mode. (OP_E_memory): Set shift for dqa_mode based on address_mode.
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2018-09-14 H.J. Lu <hongjiu.lu@intel.com>
+ PR binutils/23655
+ * i386-dis-evex.h (evex_table): Replace Eq with Edqa for
+ vcvtsi2ss%LQ, vcvtsi2sd%LQ, vcvtusi2ss%LQ and vcvtusi2sd%LQ.
+ * i386-dis.c (Edqa): New.
+ (dqa_mode): Likewise.
+ (intel_operand_size): Handle dqa_mode as m_mode.
+ (OP_E_register): Handle dqa_mode as dq_mode.
+ (OP_E_memory): Set shift for dqa_mode based on address_mode.
+
+2018-09-14 H.J. Lu <hongjiu.lu@intel.com>
+
* i386-dis.c (OP_E_memory): Reformat.
2018-09-14 Jan Beulich <jbeulich@suse.com>