From d20dee9efad3c23c9098f03ac785037572258483 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 14 Sep 2018 10:49:43 -0700 Subject: x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32-bit mode Update x86 disassembler to ignore the EVEX.W bit in EVEX vcvt[u]si2s[sd] instructions in 32-bit mode. gas/ PR binutils/23655 * testsuite/gas/i386/evex.d: New file. * testsuite/gas/i386/evex.s: Likewise. * testsuite/gas/i386/i386.exp: Run evex. opcodes/ PR binutils/23655 * i386-dis-evex.h (evex_table): Replace Eq with Edqa for vcvtsi2ss%LQ, vcvtsi2sd%LQ, vcvtusi2ss%LQ and vcvtusi2sd%LQ. * i386-dis.c (Edqa): New. (dqa_mode): Likewise. (intel_operand_size): Handle dqa_mode as m_mode. (OP_E_register): Handle dqa_mode as dq_mode. (OP_E_memory): Set shift for dqa_mode based on address_mode. --- opcodes/ChangeLog | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'opcodes/ChangeLog') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4895fc3..7def411 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,16 @@ 2018-09-14 H.J. Lu + PR binutils/23655 + * i386-dis-evex.h (evex_table): Replace Eq with Edqa for + vcvtsi2ss%LQ, vcvtsi2sd%LQ, vcvtusi2ss%LQ and vcvtusi2sd%LQ. + * i386-dis.c (Edqa): New. + (dqa_mode): Likewise. + (intel_operand_size): Handle dqa_mode as m_mode. + (OP_E_register): Handle dqa_mode as dq_mode. + (OP_E_memory): Set shift for dqa_mode based on address_mode. + +2018-09-14 H.J. Lu + * i386-dis.c (OP_E_memory): Reformat. 2018-09-14 Jan Beulich -- cgit v1.1