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| author | Kito Cheng <kito.cheng@sifive.com> | 2025-01-21 22:07:25 +0800 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2025-03-03 11:47:23 +0800 |
| commit | 56a0188548edc605e7e87906822a186c8ce822e1 (patch) | |
| tree | 709dd3928dc126d6c953f07f3e98785055c7d677 /include | |
| parent | ade87b8e6293f146f754629101cf4e367aec5da9 (diff) | |
| download | binutils-56a0188548edc605e7e87906822a186c8ce822e1.zip binutils-56a0188548edc605e7e87906822a186c8ce822e1.tar.gz binutils-56a0188548edc605e7e87906822a186c8ce822e1.tar.bz2 | |
RISC-V: Support ssqosid extension with version 1.0.
It only add one new CSR: `srmcfg`.
Ref: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/riscv-opc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h index 71ad7ff..24af3ac 100644 --- a/include/opcode/riscv-opc.h +++ b/include/opcode/riscv-opc.h @@ -4254,6 +4254,8 @@ #define CSR_VL 0xc20 #define CSR_VTYPE 0xc21 #define CSR_VLENB 0xc22 +/* Ssqosid CSR addresses. */ +#define CSR_SRMCFG 0x181 #endif /* RISCV_ENCODING_H */ #ifdef DECLARE_INSN DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32) @@ -5393,6 +5395,8 @@ DECLARE_CSR(vcsr, CSR_VCSR, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_N DECLARE_CSR(vl, CSR_VL, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) DECLARE_CSR(vtype, CSR_VTYPE, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) DECLARE_CSR(vlenb, CSR_VLENB, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) +/* Ssqosid CSR. */ +DECLARE_CSR(srmcfg, CSR_SRMCFG, CSR_CLASS_SSQOSID, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) #endif /* DECLARE_CSR */ #ifdef DECLARE_CSR_ALIAS DECLARE_CSR_ALIAS(dscratch, CSR_DSCRATCH0, CSR_CLASS_DEBUG, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE) |